Novas Targets Design Reuse with Reusner Design Knowledge Publisher, Automates Knowledge Capture and Transfer.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Dec. 8, 2003

Debug Leader Introduces New Knowledge Sharing Process

to Accelerate Design Comprehension and Debug

Novas Software, Inc., the leader in debug systems for complex chip designs, today introduced the Reusner(TM) Design Knowledge Publisher and a "smart reuse" methodology that enables design and verification engineers to automatically extract, capture and convey their understanding of design behavior. This technique allows in-house design teams and third-party intellectual property (IP) providers to electronically publish critical design knowledge for debug and product documentation of integrated circuit (IC) designs, IP components, reusable design blocks and system-on-chip (SoC) platforms.

Novas' Reusner Design Knowledge Publisher enables a new knowledge reuse methodology based on the premise that the hardware description language (HDL) is the reference source for the design. It is the first HDL-driven system to generate graphical design views that respond automatically to code changes. The underlying infrastructure includes new visualization technologies built on top of Novas' knowledge-based system architecture. These technologies facilitate Reusner's intelligent, active knowledge sharing process that contrasts the passive, disconnected nature of existing design and IP documentation approaches. Reusner is fully integrated with Novas' industry-leading debug platform so engineers can take advantage of Reusner views to accelerate debug.

"Reusner enhances the value of our flagship debug platform," said Dave Kelf, vice president of marketing at Novas Software. "With Verdi and Debussy, we provide individual design and verification engineers the means to quickly understand and debug unfamiliar designs. Reusner extends this capability to allow them to efficiently capture and share their knowledge of design behavior across and between design organizations. This solves a critical problem for diverse, global teams, as well as for the developing IP industry."

Knowledge Reuse Process

Design understanding and knowledge are crucial to design success, especially as companies move to more complex system-on-chip (SoC) technologies and methodologies. But often, important knowledge is lost, missing or inaccessible due to ad hoc documentation processes and the widening gap across time and distance within distributed design organizations. Legacy designs or third-party IP blocks can be especially difficult to understand because of limited access to the original creators or other experts. For external IP, the ability to transfer design and integration knowledge has direct technical and business implications for both IP providers and consumers.

"Capturing and sharing design knowledge is critical for IP development teams, and communicating the necessary information to customers is equally critical for success of the IP industry in general," said Anne Espinoza, director of Databahn IP Engineering, Denali Software, Inc. "There is significant value in tools like Reusner that can help to automate this process. With a more direct path to understanding how IP is supposed to function, design teams can ultimately integrate, verify and debug their chips faster."

Reusner's knowledge publishing process commences with the automated creation of meaningful graphical views from Verilog, VHDL and mixed-language designs. Design knowledge is extracted directly from the HDL source code to efficiently produce highly readable diagrams known as views. These views can then be interactively edited for visual clarity by rearranging the size and location of components and their ports, re-routing connections, and annotating them with textual information.

The connectivity represented in Reusner views is at all times directly connected to the design information compiled from the HDL. In this way, multiple views that contain overlapping sets of design elements can be created and stored without disrupting visual edits, in order to target specific information needs and communications requirements. Because all views are linked to the original HDL, they are automatically updated in response to HDL modifications, thus eliminating the maintenance burden associated with traditional documentation.

The views may then be published by design and verification team members as they develop understanding of the design, or delivered by IP providers as electronic specifications. When used within Novas debug environments, they function as debug windows customized for specific design or IP elements. The views may also be exported to third-party applications such as FrameMaker and MSOffice, as well as in HTML format, for formal documentation purposes.

New Automation Technologies

Reusner is based on the same Design Knowledge Architecture (compilers, databases) as Novas' core debug systems. In addition, Reusner utilizes an entirely new visualization engine that drives the generation of documentation-quality block diagrams, schematics and finite state machine bubble diagrams. This new topology-driven visualization engine also has built-in synchronization control to ensure that design views are always current. Reusner instantly recreates saved design views as they are opened, combining the stored visual topologies with the connectivity extracted from the latest design information. HDL source code changes are, therefore, automatically reflected in the updated view.

Reusner views are catalogued in reusable electronic design notebooks for easy access using intuitive search, query and recall utilities. These provide an effective mechanism for communicating design intent between those who create design blocks and those who verify or reuse them.

Debug & Knowledge Reuse Applications

By providing a natural extension to the way engineers work, Reusner reduces debug time with more effective knowledge sharing throughout the design and verification process, and preserves design understanding gained during debug for future use. Reusner applications also include local and global team collaboration, design reviews, design block reuse and delivery of active documentation to aid the integration of third party IP.

The views saved with Reusner are fully active for interactive debugging with Novas' Verdi(TM) Behavior-Based Debug System and Debussy(R) Debug System. Engineers can trace design connectivity directly within the saved views, and use drag-and-drop features to immediately access information in other views, such as the relevant source code for any block or the waveform for any signal. They can also annotate simulation results directly into the customized views.

Availability and Pricing

Novas' Reusner Design Knowledge Publisher is available immediately as an option to the Verdi and Debussy Debug Systems. It is U.S. list priced starting at $10,000 for a one-year time-based license. Read-only access to Reusner design views is provided to Verdi and Debussy customers at no additional charge.

About Novas

Novas is the pioneer of debug systems that reduce the functional verification costs for complex IC designs. Building upon the strength of its market-leading Debussy(R) Debug System, Novas' Verdi(TM) Behavior-Based Debug System further improves the efficiency of designers in the system-on-chip era with advanced design exploration and automated debug capabilities. These allow design teams to better understand and analyze complex or unfamiliar design behavior, and cut by half or more the time it takes to locate, isolate and solve the root causes of design problems. For two consecutive years, Novas has received the highest ranking for customer satisfaction in a comprehensive EDA study published by CMP with more than 10,000 systems installed worldwide and 30 EDA companies utilizing Novas technology in their products today. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit http://www.novas.com or send email to [e-mail].

Debussy is a registered trademark, and Verdi and Reusner are trademarks of Novas Software, Inc. All other trademarks or registered trademarks are the property of their respective owners.

Note to Editors:

Digital screenshot photography of Reusner (pronounced as roi-z-ner) is available upon request.