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NexGen Shipping NxPCI Logic Chipset And Motherboards With Up To 25% Performance Advantage Over Pentium.


MILPITAS, Calif.--(BUSINESS WIRE)--Sept. 12, 1995--NexGen(TM), Inc. (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:NXGN) today announced availability of high performance PCI (1) (Payment Card Industry) See PCI DSS.

(2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus).
 (Peripheral Component Interconnect See PCI.

(hardware) Peripheral Component Interconnect - (PCI) A standard for connecting peripherals to a personal computer, designed by Intel and released around Autumn 1993. PCI is supported by most major manufacturers including Apple Computer.
) Bus chipsets and motherboards that support its Nx586 processor family of fifth-generation x86 processors.

The Nx586 processor is the only fifth generation alternative to the Pentium(R) processor currently in production.

This innovative NxPCI chipset provides high-end functionality with features such as a high performance memory subsystem, an integrated fast bus master IDE (Integrated Drive Electronics See IDE.

Integrated Drive Electronics - Advanced Technology Attachment
) controller, and support for EDO Edo: see Tokyo, Japan.  (Extended Data Out) DRAM. The NxPCI system logic design is a four-chip solution which consists of the NxPCI system logic, NxMC(TM) memory controller, the NxPI(TM) PCI/ISA (Industry Standard Architecture) bridge, and the Sonata(TM) Bus Master IDE Controller (SL82C105) by Symphony(TM).

"The Nx586 processor/PCI motherboard solution is an excellent match to the new Windows 95 operating system," stated Dana Krelle, NexGen's Vice President of Sales and Marketing. The Nx586 processor, optimized for 32-bit processing, is ideal for 32-bit operating systems; the plug-n-play capabilities of PCI align with similar goals for Windows 95.

For example, Krelle noted, Symantec(TM)'s Windows 95 benchmark, found in Norton Utilities(TM) for Windows 95, "shows Nx586 processor performance to be 25% greater than equivalent Pentiums running 32-bit applications."

The NxPCI system logic chip offers full PCI Local Bus Revision 2.0 support at up to 33MHz PCI operation. It has a full 64-bit multiplexed bus to the Nx586 processor at speeds up to 66MHz. The NxPCI chip supports concurrent asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end.  and synchronous operation as well as PCI Bus Master arbitration (4 masters + NxPCI + PCI/ISA Bridge).

Although implemented first in a uniprocessor design, the NxPCI is designed to support a 2-way multiprocessor environment. With high performance in mind, the NxPCI chip incorporates features such as PCI Bus Master Buffers, Processor to PCI buffers, processor to video buffers, and video write merging.

The NxMC Memory Controller incorporates a full 64-bit multiplexed bus to the Nx586 processor at speeds up to 66MHz. Its high performance DRAM interface incorporates a 64-bit data bus, support for six SIMM sockets of parity DRAM (up to 768MB), as well as EDO and Fast page memory support. The NxMC controller also incorporates advanced performance features including dual address read prefetching Prefetching generally means loading something ahead of time and could refer to any one of the following topics:
  • Instruction prefetch in computer architecture is a microprocessor speedup technique.
, deep write buffers, ROM shadowing, and hidden DRAM refresh.

The Sonata SL82C105 Bus Master IDE controller, designed and manufactured by Symphony Laboratories, supports all types of IDE devices including PIO PIO Public Information Office
PIO Public Information Officer
PIO Port Installed Option (automotive)
PIO Programmed Input/Output
PIO Person of Indian Origin
 (Processor Input/Output) Mode 3, 4, and 5 (proposed) drives. The bus master controller reduces PCI bus and CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 utilization due to reduced interrupts which then frees these resources to perform more intensive multi-media functions.

The chip also features a multi-threading capability which allows two simultaneous I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 processes, and its dual port and multi-word DMA (1) (Digital Media Adapter) See digital media hub.

(2) (Document Management Alliance) A specification that provides a common interface for accessing and searching document databases.
 (Direct Memory Access) Mode support up to four of the fastest disk drives available.

NexGen is also now delivering its NxPCI Baby-AT motherboard, a high-performance design for PCI-based implementations of the Nx586 processor. Taking full advantage of the new NxPCI System Logic chipset, this well-integrated design features on-board bus mastering IDE, integrated super I/O functions, a high performance memory subsystem supporting up to 768 MB DRAM, and full PCI local bus support.

The fast bus master IDE capabilities include support for PIO modes 0, 1, 2, 3, 4 and 5 and DMA modes 1, 2 and 3. There is support for up to four IDE devices on two independent ports. In addition, there are 4 ISA (1) (Instruction Set Architecture) See instruction set.

(2) (Interactive Services Association) See Internet Alliance.

(3) (Internet Security and Acceleration) See .NET.
 and 3 PCI slots as well as an on-board floppy controller, 2 serial ports (16550 compatible), and 1 enhanced parallel port See EPP.

(hardware) enhanced parallel port - (EPP) A parallel port that confirms to the IEEE's EPP standard. An EPP is actually an expansion bus that can handle 64 disk drives and other peripherals.

["PC Magazine", 1996-01-09, p. 262].
. The 4-layer NxPCI Baby-AT motherboard supports either an AMI(R) or Award(R) flash BIOS and is designed with a ZIF socket to ensure ease of upgradability. These BIOS's have integrated plug and play support for both PCI and ISA peripherals.

NexGen, Inc. (NASDAQ: NXGN) develops and utilizes industry-leading processor technologies to deliver high performance x86 processors to mainstream PC users. The Milpitas, California-based company currently holds many patents for its leading-edge x86 processor technology and has several more patents in process.

For product information, call 1-800-8NEXGEN (1-800-863-9436) or (408) 435-0202, or you can reach us on the Web at http://www.nexgen.com. -0-

Note to Editors: NexGen, NxPCI, NxMC are trademarks and Nx586 is a registered trademark of NexGen, Inc. Windows 95 is a trademark of Microsoft Corporation. AMI is a registered trademark of American Megatrends, Inc. Award is a registered trademark of Award, Inc. Pentium is a registered trademark of Intel Corporation. Symantec and Norton Utilities are trademarks of Symantec Corporation.

CONTACT: NexGen, Inc.

David Kulbarsh, 408/325-8283

or

ChipShots, Inc.

Bruce LeBoss, 800/593-CHIP
COPYRIGHT 1995 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1995, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Sep 12, 1995
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