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New core logic products from Galileo Technology set new standards for embedded system price/performance levels; new high-integration chipset products lets designers build 133 MIPS+ embedded systems for under $75.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--April 14, 1997--Galileo Technology announced today two new core logic chips, the GT-64011 and GT-64014, for the high-performance/low-cost IDT/MIPS RV4640 and RV4650 processors. Both of these new products from Galileo provide an EDO DRAM See EDO RAM.

EDO DRAM - Extended Data Out Dynamic Random Access Memory
 controller, 4 channels of DMA (1) (Digital Media Adapter) See digital media hub.

(2) (Document Management Alliance) A specification that provides a common interface for accessing and searching document databases.
, and a complete device controller; the GT-64011 also supports a high bandwidth PCI (1) (Payment Card Industry) See PCI DSS.

(2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus).
 master/slave interface.

"RISC processors such as IDT's RV4640 and RV4650 offer tremendous performance capabilities for demanding applications such as data communications, telecommunications, and digital video distribution," stated Mitch Kahn, Galileo's vice president of marketing. "These processors, in combination with Galileo's new core logic products, the GT-64011 or GT-64014, provide embedded system designers with a powerful set of bus interface and device control capabilities at a remarkably low cost."

Galileo's director of product marketing, Barry Gray added: "Embedded systems are differentiated using powerful system software and hardware functionality to enable leading edge features. The key is to provide these advanced features at price points which drive market demand. The combination of Galileo's core logic and IDT's RISC processors enables more than 133 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second.  performance at component costs of less than $75. Previous solutions required resource-consuming ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  development and/or several components whose high cost prohibited mass market acceptance."

Extensive Feature Set

The GT-64011 has a three-bus architecture, and the GT-64014 supports two busses. Both provide a 32-bit interface to the CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 and a 32-bit interface to memory and device subsystems; the GT-64011 also supports a 32-bit PCI interface. The three buses are de-coupled from each other for most accesses, enabling concurrent operation of the CPU, PCI I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
, and accesses to memory. The CPU interface supports bus frequencies up to 50MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. , while the processor can operate at internal clock rates up to 200 MHz.

Both the GT-64011 and GT-64014 provide a flexible DRAM memory controller that supports EDO Edo: see Tokyo, Japan.  as a well as page mode DRAMs. Memory can be addressed up to 512MB, separated in up to 4 independent banks. Other types of memory devices may also be used including flash, EPROM EPROM
 in full erasable programmable read-only memory

Form of computer memory that does not lose its content when the power supply is cut off and that can be erased and reused.
, SRAM See static RAM.

SRAM - static random-access memory
, and FIFOs. The 64011 and 64014 also incorporate four high-performance DMA engines. The DMA channels can be programmed by the CPU or by PCI bus masters, or without CPU intervention via a linked record list.

The PCI interface on the GT-64011 is fully compliant with both PCI 2.1 and Plug & Play standards. The GT-64011's PCI controller becomes a master whenever the CPU or internal DMA engine initiates a PCI bus cycle. These cycles can be Memory, Interrupt Acknowledge, Special, I/O, or Configuration cycles.

Typical Applications

The GT-64011 is an ideal choice for PCI-based data communications systems. Galileo's core logic is currently designed into applications such as Cisco 7200-series routers and Ethernet and Fast Ethernet switches using Galileo integrated switch chips such as the GT-48001A and the GT-48002. High-performance PCI add-in cards, such as those used in WAN remote access servers, also use the GT-46011 as a glue-less interface between the local protocol processor and main CPU.

Evaluation and Development Tools

The Galileo-9 PCI Evaluation Board is available for customers to prototype and develop software for the GT-64011 and GT-64014. Galileo-9 is a full-size PCI add-in card with a 100MHz R4640 processor, four DRAM SIMM slots, 2 Mbytes of Flash memory, and a 1 Mbyte EPROM. Headers are available for interfacing custom logic. Galileo-9 can be used in any PCI based workstation, or plugged into the optional Galileo-4PB passive PCI backplane. Schematics of all Galileo evaluation platforms are available on Galileo's website.

Price and Availability

Samples of the GT-64011 and GT-64014 are available now and both devices will be in production during the second quarter of 1997. Pricing for the GT-64011 is $24.95 and the GT-64014 is $19.95; both in 10K unit quantities.

About Galileo Technology

Galileo Technology, the market leader in PCI core logic for RISC processors, is one of the semiconductor industry's fastest growing suppliers of complex, high-performance, integrated circuit devices. Galileo's products include PCI core logic, single-chip Ethernet and Fast Ethernet switches, and WAN coprocessors. Galileo was recently honored by Upside Magazine as one of the 100 hottest private companies, and was the recipient of the Fabless Semiconductor Association's 1996 award for Fastest Growing Private Company. Galileo employs more than 70 people worldwide with business headquarters in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County.  and R&D headquarters in Karmiel, Israel. For more information on Galileo, call 408/451-1400 or visit our website at http://www.galileoT.com . -0-

Copyright, 1997 Galileo Technology, Inc. Galileo Technology and the Galileo logo are registered trademarks of Galileo Technology. Any other product names mentioned herein are the property of their respective owners.

CONTACT: Galileo Technology

Mitch Kahn, 408/451-1400

mak@galileoT.com
COPYRIGHT 1997 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1997, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Apr 14, 1997
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