New approach to fatigue testing of chip-level interconnects. (General Developments).
Researchers at NIST, in collaboration with the Max-Planck-Institute for Metals Research, have been conducting fatigue testing of thin aluminum and copper films on silicon-based substrates through the application of high current density ac signals. This novel approach to studying cyclic deformation of chip-level interconnects depends upon Joule J1. The International System unit of electrical, mechanical, and thermal energy. 2. A unit of electrical energy equal to the work done when a current of 1 ampere is passed through a resistance of 1 ohm for 1 second. 3. A unit of energy equal to the work done when a force of 1 newton acts through a distance of 1 meter. self-heating of the metal and the differences in coefficient of thermal expansion between film and substrate materials. Effects of frequency, waveform, encapsulant, and local interconnect microstructure are being investigated in materials systems in their actual in-use configurations, without special specimen preparation or removal of films from their substrates.
One recent result shows that soft polymeric-based encapsulants do not suppress deformation-induced topography in aluminum lines. This test method provides a means for understanding the reliability of interconnects subjected to severe repeating loads due to power cycling, energy conservation, and processor loading.
CONTACT: Bob Keller, (303) 497-7651; keller@boulder.nist.gov.
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