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New Ultra-Low Power SRAM From MoSys Sets New Records for System Cost-Performance.


SUNNYVALE, Calif.--(BUSINESS WIRE)--July 16, 1998---

Broad Product Line Offering Targets Mobile, Desktop and Networking Applications, With Unprecedented 90-Percent Savings In Power Consumption And 50-Percent Savings In Board Space

MoSys, Inc., announces ultra-low power SRAM See static RAM.

SRAM - static random-access memory
 product family. A new 64Kx64, 512KByte single-chip, pipeline burst SRAM (PBSRAM PBSRAM Pipelined Burst Static Random Access Memory
PBSRAM Pipelined Burst Synchronous Ram
), as well as 256Kx32 and 128Kx32 PBSRAMs.

The Ultra-Low Power SRAM product family is based on MoSys' patented technology, resulting in the industry's smallest memory cell array. The new products incorporate innovative and proprietary power-saving technologies and feature power dissipation 80 to 90 percent lower than competitor's offerings, at the same voltage and frequency conditions, making them ideal for Notebook PCs, Sub-notebook PCs, PDAs and other low-power applications.

Having the industry's smallest memory cell array, 75% smaller than a standard SRAM cell array, makes the Ultra-Low Power SRAM product family the most cost effective memory solution for Mobile PCs, high-performance Desktop PCs as well as networking and communication applications.

The MC80364K64, 64Kx64 PBSRAM is designed to address the stringent power and space requirements of mobile applications, reducing power consumption by almost 90 percent compared with standard PBSRAMs and featuring a built-in sleep mode extending battery life and lowering operating temperatures. Packaged in a 128-pin LQFP See QFP. , the MC80364K64 measures only 14x20mm, resulting in a 50-percent reduction in board space compared to 512Kbyte caches implemented using traditional 64Kx32 PBSRAM.

The MC803128K32 and MC803256K32, 128Kx32 and 256Kx32 PBSRAMs are designed to address the cache size requirements of Desktop PCs. With operating speeds as high as 133MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  now and 166MHz devices available in Q3 '98, the devices enable the highest possible performance for systems with 1 and 2 MByte level two caches level two cache - secondary cache .

By employing a larger level two cache, the system performance is greatly enhanced in today's multimedia-rich applications with large data sets, even when compared to processors at higher clock frequencies, which are significantly more expensive, but with smaller level two caches.

"MoSys' SRAM is a breakthrough technology that will enable system designers to re-evaluate traditional cost-performance tradeoffs in memory hierarchy The levels of memory in a computer. From fastest to slowest speed, they are:

1. CPU registers
2. L1 cache
3. L2 cache
4. Main memory
5. Virtual memory
6. Disk
 and system architecture," said chairman and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  Fu-Chieh Hsu. "MoSys intends to bring the cost, performance and dramatic power advantages of our patented technology to all high performance SRAM application segments".

Both MC80364K64 and MC803128K32 are available now in speeds of 100, 117 and 133MHz, with 3.3V supply and 2.5V-3.3V IO voltage.

Packaged in a 128-pin LQFP, the MC80364K64 is priced at $7.00 in high volume.

Packaged in a 100-pin LQFP, the MC803128K32 is priced at $5.00 in high volume.

"Flow-through" versions, as well as, higher speed grades of 150 and 166MHz will be available in Q3 '98. Networking oriented 128Kx36 and 256Kx36 devices, with 100% bus utilization during read-write-read operations, will be introduced in Q4 '98. Additional, 8 and 16Mbit density products will follow in 1999.

MoSys, Inc. is the industry pioneer of high performance memory technologies such as multibanking, multibank caching, double data rate, fast cycle access, data streaming, terminated reduced-swing I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 switching, source-synchronous (wave-pipelining) data access, PLL-assisted clocking, ultra-fast charge sensing and ultra-fast memory cycle time. Many of these technologies are patented and incorporated in the company's high performance Multibank DRAM See MDRAM. , MCache, ultra-fast SGRAM (Synchronous Graphics RAM) A type of dynamic RAM chip that is similar to the SDRAM technology, but includes enhanced graphics features for use with display adapters.  and ultra-low power 1T-SRAM products and building blocks.

Note to Editors: MoSys, MDRAM (Multibank DRAM) An earlier type of dynamic RAM chip from MoSys, Inc., Sunnyvale, CA (www.mosys.com) that was available in 256KB increments. It enabled embedded applications with fixed memory requirements to have exactly the amount of RAM they need. , MCache and Multibank are registered trademarks of MoSys, Inc., 1T-SRAM is a trademark of MoSys, Inc.

    CONTACT: MoSys, Inc.
              Andre Hassan, 408/731-1826
              ahassan@mosys.com


COPYRIGHT 1998 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1998, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Article Type:Article
Geographic Code:1USA
Date:Jul 16, 1998
Words:567
Previous Article:Mosys Introduces Industry's Highest Performance 16 Megabit Synchronous Graphics RAM.
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