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New Synopsys VHDL Model Compiler Extends Complex IP Protection and Portability To VHDL-Based Design Flows.


EDINBURGH, Scotland--(BUSINESS WIRE)--Nov. 1, 1999--

Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), is extending its commitment to enable both hard and soft intellectual property (IP) creators to easily package and export their IP for efficient design re-use with the announcement of the VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  Model Compiler (VhMC).

VhMC joins Synopsys' industry-standard Verilog Model Compiler(VMC See VESA Media Channel. (TM)) and C Model Compiler to allow IP developers to easily create and distribute secure, portable simulation models, regardless of the language used to develop the IP or the target simulator selected by the system integrator.

"Successful, rapid design and verification of complex systems -- especially system on a chip designs -- requires access to a wide range of high performance and accurate simulation models of the IP blocks embedded in the design," said Geoff Bunza, vice president of Synopsys' Large System Technology Group. "But this kind of broad model access has historically been limited by the IP creator's concerns about portability and security, as well as the IP integrator's issues about simulation performance of the embedded model. Our model compilers provide the most practical solution to all of these issues, including our latest support for the VHDL language."

Synopsys' model compilation technology has helped leading semiconductor and IP vendors, including ARM, Hyundai, IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) , Lucent Technologies, Mitel, Motorola, NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).

NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd.
, Siemens, and Transwitch to make their products available to more system designers sooner in the design cycle, while still protecting their high-value IP.

"A major concern of Lucent Technologies has been the process of efficiently delivering IP in a secure environment," said Jim Fullerton, design methodology manager for field-programmable system chips (FPSCs) at Lucent Technologies. "Prior to using Synopsys modeling technology, we were required to deliver a Verilog model, a VHDL model, an SDF (Standard Data Format) A simple file format that uses fixed length fields. It is commonly used to transfer data between different programs.

SDF Pat Smith 5 E. 12 St. Rye NY Bob Jones 200 W. Main St. Palo Alto CA Comma delimited "Pat Smith","5 E.
 file, and the underlying ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  library under NDA (Non Disclosure Agreement) An agreement signed between two parties that have to disclose confidential information to each other in order to do business. In general, the NDA states why the information is being divulged and stipulates that it cannot be used for any  to allow our customers to evaluate our IP used in FPSC FPSC Florida Public Service Commission
FPSC Financial Planners Standards Council (Canada)
FPSC Field Programmable System Chip (Lucent Technologies)
FPSC Fundación Promoción Social de la Cultura
 designs. Synopsys' technology enables us to deliver a single C-level model, which simplifies our IP delivery and increases our IP protection, without sacrificing simulation performance."

Supports Early Evaluations of Cores and Standard Devices

The Synopsys model compilers makes it easy to generate, distribute and support robust simulator-independent models that are derived directly from the design flow -- without waiting for first silicon. This makes it possible for the IP provider to give system designers early accevalidate ARM Powered system-on-a-chip designs long before first silicon is available."

Making Models Easy to Create, Distribute and Support

All Synopsys model compilers -- including the new VhMC -- provide consistent model template generators, model debug tools and interface code and utilities. Dynamic loading, instance-based memory management, model isolation, versioning and logging, as well as model authorization, are all provided without requiring any modification in the IP providers' coding style. The resulting models can be distributed and supported by either the IP provider or Synopsys.

Synopsys model compilers support a variety of industry-standard simulation interfaces including the Logic Modeling(R) SWIFT(TM) interface, which links models to more than 30 simulation environments.

VhMC will be available for general release in January 2000, at a price of $175,000 (USD USD

In currencies, this is the abbreviation for the U.S. Dollar.

Notes:
The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion.
) for unlimited model generation and distribution. Configurations with limited model generation and distribution capability can be licensed starting at $65,000 (USD).

The Synopsys Verification Solution

VhMC and the other Synopsys model compilers are part of a powerful suite of Synopsys high-level verification products and services which also includes VCS (1) (Verilog Computer Simulator) See Verilog.

(2) (Version Control System) See version control.
(TM), the industry's fastest Verilog simulator, Cyclone(R)/VSS(TM) for high-performance VHDL simulation, a comprehensive range of proven Logic Modeling(R) IP models for simulation, the Synopsys Eaglei(R) hardware/software co-verification tools and the VERA VERA Virtual Entity of Relevant Acronyms
VERA Virtual Electronic Resource Access
VERA Vienna Environmental Research Accelerator
VERA Verzeichnis Edv-Relevanter Akronyme (German: Virtual Entity of Relevant Acronyms; website) 
(TM) testbench automation and analysis products to help designers meet the challenges of complex system verification.

For more information, contact your local Synopsys representative, email verify@synopsys.com, or, in North America, phone 800/346-6335.

Synopsys, Inc

Synopsys, Inc. (Nasdaq:SNPS) is the leading supplier of electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) solutions to the global electronic market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems-on-a-chip. Synopsys also provides consulting services and support to its customers to streamline the overall design process and accelerate time-to-market. Additional information about Synopsys is available at http://www.synopsys.com.

Note to Editors: Synopsys, Logic Modeling, and Synopsys Eaglei are registered trademarks and VMC, VCS, VSS, Cyclone, SWIFT and VERA are trademarks of Synopsys, Inc. ARM and ARM Powered are registered trademarks of ARM Limited. ModelGen is a trademark of ARM Limited.
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Copyright 1999, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Date:Nov 1, 1999
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