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New Actel low-cost starter kit demonstrates secure in-system programmability of ProASIC3/E FPGAS.


Giving developers of high-volume applications the capability to incorporate secure in-system programmability (ISP) for the first time in their products, Actel Corporation (Nasdaq: ACTL ACTL American College of Trial Lawyers (Irvine, California)
ACTL Access Carrier Terminal Location
ACTL Activation Library
ACTL Automated Compatibility Test Laboratory
ACTL Association Cultural Turkey-Luxembourg
) today announced immediate availability of the ProASIC3 starter kit and sampling of its 250K-gate A3P250 field-programmable gate array (hardware) field-programmable gate array - (FPGA) A gate array where the logic network can be programmed into the device after its manufacture. An FPGA consists of an array of logic elements, either gates or lookup table RAMs, flip-flops and programmable interconnect wiring.  (FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. ). Actel unveiled dual versions of the starter kit to ease design implementation and offer low-cost, full-speed programming for the A3P250 device. Available in both a prototyping and a low-cost evaluation version, the starter kit allows the exploration of the architectural features unique to the ProASIC3/E family, including secure ISP and live at power-up capability.

The A3P250 device is the latest addition to Actel's ProASIC3/E family, the industry's lowest cost FPGA family and the only single-chip device family with secure ISP, via 128-bit AES encryption. The A3P250 device is an attractive programmable logic solution for a range of high-volume, value-based applications in the consumer, industrial, medical, communications and automotive markets.

"With the announcement of immediate availability of the low-cost starter kit and our A3P250 device, Actel continues to execute its plan to rollout the ProASIC3/E family, the industry's only true flash-based FPGA solution," said Martin Mason, director of flash product marketing, Actel.

In addition to market-leading lowest total system cost, the single-chip 250K-gate A3P250 FPGA contains 1024 bits (128 bits x 8 pages) of on-chip user nonvolatile flash memory and six clock conditioning circuits, one with on-board phase-locked loop (PLL). The A3P250 supports four I/O banks with up to 157 I/Os and advanced I/O standards including PCI (1) (Payment Card Industry) See PCI DSS.

(2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus).
, LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground.  and LVPECL LVPECL Low Voltage Positive Emitter Coupled Logic . For power-conscious customers, the A3P250 devices deliver stand-by power consumption of only 3mA under typical conditions.

The A3P250 device provides secure ISP capability through on-chip 128-bit AES decryption and built-in flash key storage technology. Because an AES decryption key is required to reverse engineer the encrypted configuration bitstream for a ProASIC3/E device, attempts to copy designs through the interception of the bitstream are futile. The AES-encrypted programming file allows easy and secure field upgrades for Actel ProASIC3/E devices.

The starter kit is available in two versions. The "EVAL" kit includes an A3P250 FPGA soldered directly to an evaluation board, providing customers a low-cost solution to validate the performance of the device. The "PROTO" kit includes a socket-equipped evaluation board, allowing 9 of the 10 devices in the ProASIC3/E family to be evaluated with the "PROTO" kit.

The "PROTO" and "EVAL" boards both contain an alphanumeric LCD display and provide CAT5E CAT5E Category 5 Enhanced Cable  connectors to demonstrate the high-speed LVDS functionality of the A3P250 (and larger) devices within the ProASIC3/E family.

Multiple starter kits may also be connected together in a JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology.

JTAG - Joint Test Action Group
 chain to demonstrate multiple-device programming via a single programmer connection. This feature facilitates a seamless connection to other JTAG-based systems that the end-user may be developing.

The starter kit contains a high-speed FlashPro3 programmer, which interfaces to a PC via a USB USB
 in full Universal Serial Bus

Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer.
 2.0 or USB 1.1 interface, Actel's Libero Libero can refer to:
  • Libero (soccer), a more versatile type of centre back in soccer
  • Libero (volleyball), a player specialized in defensive skills in volleyball
  • Mitsubishi Libero, the Japanese market name of the Mitsubishi Lancer wagon
 Gold 6.2 Integrated Design Environment (IDE) software, USB cable, programming cable, power supply, tutorials and support documentation in addition to the starter kit board.

Volume pricing for the ProASIC3/E family starts at $1.50 in 250K quantities. Samples of the A3P250 device are available now. The new ProASIC3/ E starter kits are also available now. The "PROTO" kit is priced at $449 and the "EVAL" kit is priced at $349.
COPYRIGHT 2005 Millin Publishing, Inc.
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2005, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Title Annotation:field programmable logic arrays
Publication:EDP Weekly's IT Monitor
Geographic Code:1USA
Date:Aug 15, 2005
Words:563
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