NIST assesses accuracy of thin film dimensions. (News Briefs).

The thickness of gate dielectricsthe ultra-thin insulating films that separate electrical gates and channels in transistorsis the smallest dimension to be measured on a chip. As thickness requirements fall below 4 nm, films must be produced with a thickness tolerance of less than 0.3 nm, and metrology tools with a precision of better than 0.1 nm are required. NIST is developing a new data analysis approach that quantifies the errors associated with these thickness measurements, a critical issue in semiconductor manufacturing and performance.

Using high-resolution transmission electron microscopy to measure thickness, new methods have been developed for obtaining two-dimensional calibration information from an image of the silicon lattice substrate. The ruler is the distance between silicon atoms, measured in a new way that significantly improves measurements of atom position. The approach involves computer-based image processing and a mathematical algorithm. The image of the lattice is digitized, a computer is used to define where the atoms are, and the algorithm produces a measurement based on multiple inputs.

Films nominally 2 nm thick were measured with an estimated uncertainty of 0.2 nm, confirming that standard techniques are not good enough. The researchers now are working on improving the measurement precision and understanding accuracy issues. The accuracy is estimated by computer modeling of gate dielectric stacks using simulation software. NIST researchers are quantifying the effects of variables such as microscope lens aberrations, vibration and sample properties on the accuracy of the thickness measurement and are searching for the optimal imaging conditions.

For more information, contact John Henry Scott, [phone], [e-mail].

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