NEW INSIGHTS INTO WEAR-OUT MECHANISMS OF ULTRA-THIN SILICON DIOXIDE GATE DIELECTRICS.

Researchers at NIST have recently completed several extensive experimental investigations of the mechanisms responsible for defect generation and breakdown of thin silicon dioxide films. The results confirm that breakdown is directly related to the current passing through the dielectric. The results also demonstrate that degradation and breakdown are not due to the trapping of hot holes that is commonly believed. Furthermore, a frequency dependence of dielectric lifetime for ultra-thin oxides is observed under bipolar pulsed stressing conditions for the first time. These results provide the fundamental understanding necessary to help resolve the correct physical model for thin gate oxide wear-out and breakdown. This understanding is necessary to develop standard reliability testing techniques crucial for estimating the lifetime of future generations of transistors and for estimating the ultimate thickness limit of silicon dioxide for CMOS technology. The results of this study were presented at the Internation al Reliability Workshop in October 2000 and the Semiconductor Interface Specialists Conference in December 2000.

As the semiconductor industry continues to increase integrated circuit performance by decreasing the lateral dimensions of metal-oxide-semiconductor (MOS) devices, the thickness of the silicon dioxide gate dielectric, which is projected to continue to be in use over the next 5 years, must also be scaled downward. The thickness of the gate dielectric in state-of-the-art microprocessors is 2.0 nm to 2.5 am and will continue to decrease over the next several years. Thin silicon dioxide dielectrics exhibit high tunneling current and the impact on device reliability is not well understood.