Motorola Announces DSP56305 Single-Chip Channel Codec for GSM Base Station Market; Co-Processors Boost New DSP's Performance.

AUSTIN, Texas--(BUSINESS WIRE)--Oct. 14, 1996--Motorola's (NYSE: MOT) Wireless Division, a unit of the Semiconductor Products Sector, announced details of the upcoming DSP56305 at last week's International Conference On Signal Processing Applications and Technology in Boston.

The DSP56305 is the latest addition to the DSP56300 family of high-performance programmable 24-bit digital signal processors and the first to include application-specific co-processors on chip.

The Global System for Mobile Communications (GSM) cellular networks supported by the DSP56305 require extensive digital signal processing to perform channel equalization, channel coding/decoding and ciphering/deciphering. By combining filter, Viterbi and cyclic code co-processors with an 80 MHz DSP56300 core, the DSP56305 performs all the signal processing required by a single radio carrier, executing functions that have previously required up to five separate DSPs.

"The DSP56305 is the next implementation of Motorola's DSP56300 architecture, the highest performance core in our portfolio," said Zvi Soha, vice president and general manager of the recently formed Wireless Division. "The addition of three dedicated co-processors boosts the performance level even higher and is indicative of the Wireless Division's commitment to providing optimized system solutions to the merchant market."

Three Dedicated Co-Processors

As peripheral modules operating concurrently with the DSP56300 core, the three dedicated co-processors increase the processing power of the device. This additional punch makes it possible for a single DSP56305 to perform all DSP tasks in a single carrier within a GSM Base Transceiver Station (BTS). The co-processors are:

-- The Filter Co-Processor (FCOP)

The FCOP is involved in the receive (uplink) path executing two major functions in the equalization process: Cross Correlation and Matched Filtering. The characteristics of the cellular transmission channel is determined by its operational environment (high buildings, mountains, moving car, etc.) Each of these elements may introduce interference in the received signal. The FCOP studies the channel on a burst-by-burst basis and filters the received data accordingly.

-- The Viterbi Co-Processor (VCOP)

The VCOP is vital to both the receive and transmit functions of the GSM base station. After the data is received, the Viterbi algorithm is used to equalize and decode the data bits to correct errors. Then, before transmission (downlink), the Viterbi processor encodes the data.

-- The Cyclic Code Co-Processor (CCOP)

The CCOP is a fully programmable cycle code processor and is well suited for both the GSM A5.1 and A5.2 data ciphering algorithms. During the downlink, the CCOP performs data ciphering, while deciphering occurs during the uplink. Parity code generation and check is also handled by the CCOP.

DSP56305 Features

All DSP56300 family members, including the DSP56305, are based on a high-performance DSP engine providing single clock cycle instruction execution, a rich instruction set and low power consumption. The DSP56300 modular design methodology allows rapid design and optimization to specific market and customer needs. The DSP56305 is based on the DSP56300 core and is supplemented with standard memory and peripheral modules from a growing Motorola DSP library.

In addition, Motorola is the first to develop a complete glueless interface to the Peripheral Controller Interface (PCI) bus and has placed this feature on board the DSP56305. This feature is instrumental in decreasing system cost by eliminating the need to have an additional interface chip. The PCI bus allows faster, more efficient data transferring by its integration onto the chip. The DSP56305 also contains an expansion bus which provides a glueless interface to DRAMs, SRAMs, synchronous SRAMs (SSRAMs), ROMs and peripherals.

The DSP56305 has two memory configurations, programmable by a control bit, that allow the user to increase the Program RAM by using part of the Data memory. There is either 5.5K of Program and 3.75K of X Data RAM available, or 6.5K of Program RAM and 2.75K of X Data RAM, depending on the customer's preference. In addition there is 6K of Program ROM, 3K of Y Data ROM and 2K of Y Data RAM. The DSP56305 offers 1K of Instruction Cache as well.

The DSP56305 comes with two Enhanced Synchronous Serial Interfaces (ESSIs) which provide high-speed serial links to analog converters and can support different data rates. A Serial Communications Interface (SCI) and three 16-bit timers are also provided.

DSP56305 Development Tools

Motorola currently has several robust development tools available in addition to its silicon offering. The DSP56305 is software-compatible with other members of the DSP56300 family, and pin-compatible with the DSP56301, enabling the DSP56305 to utilize existing DSP56300 family development tools. A DSP56301ADS application development system is available to provide a real-time development and debugging environment. Available for PC, Sun and Hewlett-Packard host platforms, the application development system is available for U.S. $1,500.

Additionally, a cross linker assembler and simulator (CLAS) software development package is available for PC, Sun and Hewlett-Packard platforms. This package includes a new window-based graphical user interface (GUI), providing a more powerful development environment. This tool is available on CD ROM, along with the CLAS software for the other members of the Motorola DSP portfolio, for U.S. $99. A `C' compiler is also available on CD ROM from Motorola for U.S. $350.

Third-Party Development Tools

The DSP56300 family is also supported by many third-party developers, including Domain Technologies, Inc. (Plano, Texas), Momentum Data Systems, Inc. (Costa Mesa, Calif.), Sonitech International (Wellesley, Mass.) and Spectrum Signal Processing, Inc. (Burnaby, British Columbia) and Tasking Inc. (Dedham, Mass.).

"Tasking is excited by Motorola's DSP56300 family of high-performance DSPs," said Vaughn Orchard, marketing manager, Tasking Inc., formerly BSO/Tasking. "We are pleased to support Motorola's DSP offerings with cost-effective programming solutions, including software development and debugging tools that are integrated with Motorola's ADS and evaluation module, providing customers with complete design solutions."

Pricing and Availability

Single samples of the initial 80 MHz DSP56305 will be available in a 252-pin Plastic Ball Grid Array (PBGA) packages for U.S. $75 starting in November of this year, with production volumes and pricing available in the first calendar quarter of 1997.

With 1995 worldwide sales of $8.5 billion, Motorola Semiconductor Products Sector is committed to enabling its customers' success by providing systems solutions, processes and services to anticipate and respond to changing technologies and market dynamics. As the largest U.S.-based, broad-line semiconductor supplier, Motorola's Semiconductor Products Sector delivers global resources, product design and development expertise and the highest-quality technology solutions to its customers. Motorola semiconductors power automobiles, communications and computing systems and millions of other consumer products. -0-

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