ModelSim Achieves Verilog Sign-off from LSI Logic; Sign-off Using VHDL Testbench and Verilog Gate-level Netlist Now Available.

Business Editors, Hi-Tech Writers

PORTLAND, Ore.--(BUSINESS WIRE)--March 13, 2002

Model Technology, a Mentor Graphics company, today announced that the ModelSim(R) hardware description language (HDL) simulation tool has achieved Verilog, VHDL and mixed VHDL Testbench with Verilog gate-level netlist simulation sign-off from LSI Logic Corporation (NYSE:LSI).

Using ModelSim, LSI Logic customers can now simulate application specific integrated circuit (ASIC) designs in VHDL, Verilog or a mix of Verilog netlist with VHDL Testbench.

"We have worked closely with Model Technology to make significant enhancements to its simulation tools, which has translated into higher performance, better flexibility and reduced project cycle time for our mutual customers," said Jeff Vanderlip, director of ASIC technical marketing, LSI Logic. "By qualifying mixed mode simulation, customers are able to move from VHDL to Verilog as the design progresses from RTL to netlist. Support for multi-lingual simulation allows VHDL oriented customers to simulate a Verilog netlist with fully accurate timing yet keep testbenches written in high level VHDL."

LSI Logic is a leading designer and manufacturer of SoC (system-on-chip) designs in the communications, consumer and storage markets for applications that access, interconnect and store data, voice and video. Its FlexStream(R) design methodology, leading edge process, extensive portfolio of IP and leading edge packaging provides cost-effective, high performance ASIC and SoC solutions.

By certifying ModelSim for use with mixed VHDL testbench and Verilog netlist, LSI Logic customers, such as Ericsson Microwave Systems AB, can work in a versatile simulation environment that achieves the highest simulation throughput for their designs.

"Model Technology has had a successful six-year relationship with LSI Logic through its support of ModelSim VHDL," said John Lenyo, director of marketing for Model Technology. "This new commitment strengthens our partnership to provide mutual customers with the ability to easily shift from VHDL to Verilog in the different stages of the design process."

About Model Technology

Model Technology Incorporated, a Mentor Graphics company (NASDAQ: MENT), is the industry's leading supplier of HDL simulation tools. Model Technology provides ASIC and FPGA designers with the latest in simulation technology regardless of the language (VHDL, Verilog or mixed-HDL) or platform (Unix, Windows, Linux) used. Model Technology is headquartered in Portland, Oregon, with 28 sales and distribution offices in the United States, Europe, Japan, and the Pacific Rim. For information on the nearest Model Technology representative or Model Technology products, call [phone], email [e-mail], or visit www.model.com.

About Mentor Graphics Corporation

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 3,100 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics and ModelSim are registered trademarks and Model Technology is a trademark of Mentor Graphics Corporation. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.