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Mitsubishi Samples 0.18-um, 256-Mbit PC266 DDR and PC133 SDRAMs That Use a Single-Die Design with Metal Mask Option.


SUNNYVALE, Calif.--(BUSINESS WIRE)--Nov. 1, 1999--

Manufacturing Efficiency, JEDEC-Standard Compliance, and an Easy Transition Path from SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them.  Provide DDR SDRAM with a Major Step Toward

Its Eventual Adoption in Mainstream DRAM Applications

Mitsubishi Electronics America's Electronic Device Group today announced sample availability of 256-Mbit PC266 double data rate (DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM.

DDR - Double Data Rate Random Access Memory
) and PC133 conventional synchronous dynamic random-access memories (SDRAMs) that are manufactured in a 0.18-um CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes.  process technology. Mitsubishi uses a single-die design and manufacturing process for both memory types, with a metal mask option to differentiate the DDR SDRAM from the PC133 SDRAM near the end of the manufacturing process. The resulting manufacturing efficiency plus JEDEC-standard compliance and an easy transition path from conventional SDRAM provide a major step toward the adoption of DDR SDRAM as the leading main-memory alternative for high-end computing applications. This approach also helps establish the viability for eventual use of DDR SDRAM in mainstream PCs.

"Mitsubishi's single-die manufacturing approach increases manufacturing efficiency, speeds time-to-market, and reduces long-term system development costs for server and workstation developers who need the dramatic performance boost available from DDR SDRAM, and developers who want to use PC133 SDRAM for next-generation personal computers of all types," said Cecil Conkle, assistant vice president of DRAM marketing at Mitsubishi Electronics America Inc. "However, both sets of customers also want the assurance of an easy migration path upward from conventional PC100 SDRAM, compliance to JEDEC The division of the Electronic Industries Alliance (EIA) that deals with semiconductor standards (officially, the JEDEC Solid State Technology Association of EIA). JEDEC was formed in 1958 when the Joint Electron Tube Engineering Council (JETEC) split into two Joint Electron Device  standards, and the assurance of third-party chipset support, which both DDR SDRAM and PC133 SDRAM provide."

"Following the successful launch of PC133 SDRAM, Reliance is now focused 100 percent on enabling DDR SDRAM for future ServerSet(tm) developments," said David Pulling, vice president of marketing at Reliance Computer Corporation. "DDR SDRAM is the ideal memory to implement and achieve all the future Server RAS (1) See network access server.

(2) (Remote Access Service) A Windows NT/2000 Server feature that allows remote users access to the network from their Windows laptops or desktops via modem. See RRAS and network access server.
 requirements being driven by the boom in eCommerce. Furthermore, DDR SDRAM is the de facto server memory of choice for the industry's leading server OEMs, including Compaq, Dell, Hewlett-Packard, IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) , NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98).

NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd.
, Siemens, and Sun Microsystems. Mitsubishi's new 256-Mbit products in both PC133 and DDR SDRAM versions complement our chipsets to provide high-speed memory solutions to our customers."

"In the past six months, customers who build high-end systems, such as servers and workstations, have become increasingly vocal about their planned use of DDR SDRAM technology," said Victor de Dios, president of de Dios & Associates, a market research firm specializing in DRAMs. "They view DDR SDRAM as a solid, emerging segment of the mainstream DRAM market. DDR SDRAM appears to be on a pace to achieve more than 20 percent of the worldwide DRAM market by the fourth quarter of 2000. PC133 SDRAM has also gained significant market momentum during the past several months as an easy transition from PC100 SDRAM for main memory in mainstream personal computers."

"DDR SDRAM and PC133 SDRAM are JEDEC-standard memories, and Mitsubishi has been a significant player in the development of those standards," said Desi desi Indian English
Adjective

indigenous or local

Noun

informal a person considered to be of South Asian origin [Hindi]
 Rhoden, chief executive officer and president of Advanced Memory International Inc., an organization focused on the infrastructure coordination of JEDEC-standard memories. "Mitsubishi's single-die approach for DDR SDRAM and PC133 SDRAM indicates how easily DDR can become the next step for mainstream DRAM in high-end computing market segments that require up to 2.1 Gbytes per second of bandwidth. The ease of transition from PC100 to PC133 to DDR SDRAM reduces cost and simplifies the system design direction for both DRAM manufacturers and customers."

Mitsubishi's DDR SDRAM Meets PC266 Requirements

Mitsubishi's 256-Mbit DDR SDRAM can achieve a peak data transfer rate of 2.1 Gbytes per second at a clock frequency of 133 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  -- or 266 Mbits per second per data pin -- when used with a 64-bit bus. It attains approximately twice the speed of standard SDRAM and meets PC266 system requirements with the same die size as for conventional SDRAM. The device achieves its peak data transfer rate as a result of the synchronization of data input and output with the rising and the falling edges of each clock cycle, as well as through using a bidirectional data strobe that is synchronized to the source of each high-speed signal used. Other key reasons the DDR SDRAM achieves a higher speed are because it has four banks of data storage cells that have independent, simultaneous operation, and because it uses the JEDEC-standard stub series terminated logic Stub Series Terminated Logic (SSTL) devices are a family of electronic devices for driving transmission lines. They are specifically designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory.  for 2.5 volts (SSTL SSTL Surrey Satellite Technology Ltd
SSTL Stub Series Terminated Logic
SSTL Site Specific Target Level
SSTL Solid State Track Link
_2) interface, which typically features half the voltage swing of the low-voltage transistor-to-transistor logic (LVTTL LVTTL Low Voltage Transistor Transistor Logic (AMCC)
LVTTL Low Voltage Transistor to Transistor Logic
) interface used in conventional SDRAM.

Mitsubishi's 256-Mbit DDR SDRAM is available in 64-megaword x 4-bit (64M x 4) and 32M x 8 configurations (M2S M2S Morningside Stud (UK)
M2S MPEG2 Stream
M2S Multi-Mission Seeker
M2S Modified Delay Modulation Space
56D20TP and M2S56D30TP, respectively), and supports column address strobe (hardware) Column Address Strobe - (CAS) A signal sent from a processor (or memory controller) to a dynamic random-access memory (DRAM) (qv) circuit to indicate that the column address lines are valid.  latencies (CL) of CL 1.5, CL 2, or CL 2.5 with sequential or interleaved data bursts in lengths of 2, 4, or 8 bits for each data pin. The data refresh rate is 8 Kcycles per 64 ms. The x4 configuration is particularly well suited for server, workstation, networking, and communications system applications that require system-level error correction code Noun 1. error correction code - (telecommunication) a coding system that incorporates extra parity bits in order to detect errors
ECC

telecommunication - (often plural) the branch of electrical engineering concerned with the technology of electronic
 (ECC (1) (Error-Correcting Code) A type of memory that corrects errors on the fly. See ECC memory.

(2) (Elliptic Curve Cryptography) A public key cryptography method that provides fast decryption and digital signature processing.
) detection and correction with "chip-kill" protection.

The device offers 2.5-volt operation for low power dissipation, and also features an extended mode register with delay lock loop (DLL (1) See data link layer.

(2) (Dynamic Link Library) An executable program module in Windows that performs one or more functions at runtime. DLLs are not launched by the user; they are called for by an executable program or by other DLLs.
) disable, driveability strength change, and /QFC enable for optimizaton of module and system design.

PC133 SDRAM for Next-Generation PCs

Mitsubishi's 0.18-um, 256-Mbit PC133 SDRAM is targeted for next-generation PCs and other systems that are designed to operate with a 133-MHz memory bus. It is available in 64M x 4, 32M x 8, and 16M x 16 configurations (M2V M2V Mpeg 2 Video (file extension) 56S20TP, M2V56S30TP, and M2V56S40TP, respectively); supports CL 2 or CL 3 with sequential or interleaved data bursts in lengths of 2, 4, or 8 bits for each data pin; and operates at 3.3 volts. The data refresh rate is 8 Kcycles per 64 ms.

Packaging, Availability and Pricing

Mitsubishi's 256-Mbit DDR SDRAM is available in a JEDEC-standard, 400-mil, 66-pin, thin small outline package, type II (TSOP (Thin Small Outline Package) A very thin, plastic, rectangular surface mount chip package with gull-wing pins on its two short sides. TSOPs are about a third as thick as SOJ chips. See gull-wing lead, SOP, SOJ and chip package.  II), with a 0.65-mm pin pitch. Mitsubishi's PC133 SDRAM is available in a JEDEC-standard, 400-mil, 54-pin TSOP II package with a 0.8-mm pin pitch.

Mitsubishi's 256-Mbit DDR and PC133 SDRAMs will be available in February 2000 and November 1999, respectively. Initial volume production for both products is scheduled for April 2000 with large volume production expected by the middle of 2000.

Sample pricing for the 256-Mbit DDR SDRAM is $380.95 each for PC266 versions and $285.71 each for PC200 versions. Sample pricing for the 256-Mbit PC133 SDRAM is $257.14 each for PC133 versions and $238.09 each for PC100 versions.

About Mitsubishi Electric and Mitsubishi Electronics America Inc.

Mitsubishi Electric Corporation is one of the world's top-10 DRAM suppliers and aggressively develops advanced DRAMs, such as PC100, PC133, and DDR SDRAM, RDRAM (Rambus DRAM) Pronounced "r-d-ram." A dynamic RAM chip technology from Rambus, Inc., Los Altos, CA (www.rambus.com). Rambus licensed its memory designs to semiconductor companies, which manufactured the chips. (r), and other emerging industry-standard DRAM types to support current and future customer requirements. Mitsubishi Electric is the first company to successfully integrate the process technologies of DRAM and processor logic with its highly acclaimed eRAM(tm) system integration technology, and has shipped embedded DRAM products in high volume for longer than any other supplier. eRAM is Mitsubishi Electric's brand name for its silicon process technology, products, and systems expertise that integrate memory and system-level core functions on the same integrated circuit to enable unprecedented overall system performance.

A top-tier semiconductor supplier, Mitsubishi Electric markets memory products and an extensive range of other semiconductors in North America through the Electronic Device Group of Mitsubishi Electronics America, Inc. Additional information on the Mitsubishi Electric Semiconductor Group is available at http://www.mitsubishichips.com/.

Trademark Information

eRAM is a trademark of Mitsubishi Electronics America Inc. ServerSet is a trademark of Reliance Computer Corporation. RDRAM is a registered trademark of Rambus Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders.

Keywords

Mitsubishi, DDR, SDRAM, DDR SDRAM, PC266, PC133, Synchronous DRAM, DRAM.
COPYRIGHT 1999 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1999, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Date:Nov 1, 1999
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