Mentor Graphics First to Provide Co-Verification Support for MIPS32 34K Multi-Threading Processor Cores.WILSONVILLE, Ore. -- Mentor Graphics Mentor Graphics, Inc (NASDAQ: MENT) is a US-based multinational corporation dealing in electronic design automation (EDA) for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create. [R] Corporation (Nasdaq:MENT) today announced a new processor support package (PSP (PlayStation Portable) See PlayStation. ) for the MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. 32[R] 34K[TM] family of processor cores. Developed jointly with MIPS Technologies (MIPS Technologies, Inc., Mountain View, CA, www.mips.com) Founded in 1984 as MIPS Computer Systems Inc., the company merged with SGI in 1992 and spun off as an independent entity once again in 2000. , this new C-based PSP supports transaction-level (TLM TLM Telemetry TLM Transaction Level Modeling TLM Tout Le Monde (French) TLM The Leprosy Mission (Northern Ireland) TLM Transmission Line Matrix TLM The Little Mermaid (fairy tale) ) and register-transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) simulation to give engineers a consistent platform upon which to view, validate and co-verify the multi-threaded hardware/software interactions occurring on the 34K processors. Processing multiple software threads in parallel, the MIPS32 34K cores deliver significant gains in system performance and cost savings, with a very modest increase in die size. However, taking full advantage of these capabilities requires a powerful verification approach that allows designers to see parallel operations simultaneously. "In multi-threaded processing, the hardware/software interactions of the system become intensely complex. Mentor Graphics' processor support package gives our customers insight into high-level activity across multiple threads, as well as detailed activity on any single thread," said Jack Browne, vice president of marketing at MIPS. "The result is a design flow that makes it easier for our customers to maximize the performance potential of applications based on our 34K processor family." The cycle-accurate PSP for MIPS32 34K processors is designed to work with the Mentor Graphics Seamless[R] co-verification tool, the first co-verification tool to support the 34K core family. The Mentor Graphics solution supports detailed views of the design, down to registers, system busses, and memory activity. The new Seamless PSP also supports comprehensive views of a 34K core's virtual processing A parallel processing technique that simulates a processor for applications that require a processor for each data element. It creates processors for data elements above and beyond the number of processors available. elements (VPEs) and thread contexts (TCs) to simplify verification and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. of software execution in a multi-threading system which can even include multiple operating systems running on a single 34K core. These capabilities enable engineers to optimize system performance and resolve hardware/software integration problems early in the design cycle, avoiding late-stage silicon re-spins that can cost millions of dollars. "Mentor Graphics teams with industry-leading CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. vendors like MIPS Technologies to help our mutual customers maximize the value of their processor investments," said Serge Leef, general manager of the System-Level Engineering Division at Mentor Graphics. "With this Mentor/MIPS combination, hardware engineers get a consistent, efficient system validation and co-verification platform that they can leverage throughout their electronic system level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) and traditional RTL design processes." Availability The Seamless PSP for the MIPS32 34K family is currently available from Mentor Graphics. For technical and pricing information, please email seamless_info@mentor.com. To find additional product information and technical papers, register for free Seamless workshops and functional verification seminars, please visit www.mentor.com/products/fv/hwsw_coverification/. About Mentor Graphics Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $800 million and employs approximately 4,250 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/. Mentor Graphics and Seamless are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners. |
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