Massana Unveils FILU-200, Ultra-Fast DSP Coprocessor Engine that Delivers Broad Functionality and Low Silicon Cost.

SAN JOSE, Calif.--(BUSINESS WIRE)--October 5, 1999--

Massana Inc., an emerging semiconductor IP (SIP) company, has unveiled a new coprocessor approach to DSP that results in superior functionality, performance, quality, and ease of use, while at the same time, delivers solutions at a lower silicon cost than currently available. These unique cores are especially well suited for high-performance DSP-based telecommunications, networking, and consumer applications that use RISC and CISC processors.

The engine for this breakthrough -- Massana's FILU-200 series of DSP coprocessor cores -- will be described for the first time in a technical paper to be presented by Massana's Vice President of Engineering Dr. Brian Murray at 1:10 p.m., Wednesday, October 6, 1999, during the 12th Annual Microprocessor Forum at the San Jose Fairmont Hotel. Following Dr. Murray's presentation, he and other presenters will participate on a 2:10 p.m. panel called "Approaches to DSP".

In Dr. Murray's paper, the FILU-200 is characterized as a 16-bit, 200 MIPS, 30,000-gate coprocessor DSP core that easily interfaces with either 16-bit or 32-bit host processors. A flexible, programmable, and low-cost solution, the FILU-200 enables companies to leverage their RISC processors in embedded DSP applications in such applications as xDSL, home networking, multichannel V.90, and multichannel VoIP (Voice over Internet Protocol).

"Massana's approach to the DSP market makes perfect sense," said Will Strauss, president of market research firm Forward Concepts in Tempe, AZ that is recognized as a DSP market expert. "I see the FILU-200 as a powerful extension to traditional RISC cores," Strauss continued, "enabling those companies already experienced with RISC development tools and core libraries to easily expand their product offerings into the fast-growing world of DSP. Clearly, Massana is addressing an underserved market segment." Forward Concepts has forecast a compound annual growth rate of 31 percent for DSP chips during the next few years, reaching the $13.6 billion level in 2003.

To summarize Massana's unique approach to its FILU-200 DSP core, it separates the control and signal flow by implementing the intensive regular signal processing on a dedicated DSP engine and the control on a RISC, thus "hiding" the complexity of using DSPs. Among signal processing-intensive applications for Massana's FILU-200 are both G.Lite (the reduced-rate ADSL) and full-rate ADSL, DAB (Digital Audio Broadcasting), echo cancellation, and equalizers.

A special derivative of Massana's FILU-200, targeted to G.Lite ADSL (Asymmetric Digital Subscriber Line) applications, implements the compute-intensive DSP functions of the G.lite standard and enables soft G.Lite on Pentium-based PCs, providing a much lower cost solution than using a full ADSL chipset. The FILU-200 derivative, called the FILU-DMT, also enables soft G.Lite on RISC processors for embedded applications and Internet appliances. Interest in licensing Massana's FILU-DMT has been very broad, ranging from soft modem suppliers and OEMs to major semiconductor manufacturers. The FILU-200 design is available for licensing on a worldwide basis.

A three-year-old company, Massana has successfully transformed itself from a provider of VLSI design services into a SIP company. As part of this new strategic direction, the company has relocated its corporate headquarters to Silicon Valley in Campbell, CA.

For more information, contact Irving Gold (Marketing) at Massana Inc., 51 E. Campbell Avenue, Campbell, CA 95008; Phone: [phone]; Fax: [phone]; [e-mail] Or Brian Murray (Engineering) at 408/871-1414; Fax: [phone]; [e-mail] Or visit the company on the Internet at www.massana.com.