MOSIS Deal With SEMPAC Cuts Packaging Costs for Custom ASICs.MARINA DEL REY Del Rey may refer to:
MOSIS Marine Corps Operating and Support Information System (US Marine Corps) MOSIS Micro-Optical Silicon System , a provider of low-cost prototyping and small volume production services for custom ASICs, announces a strategic agreement with SEMPAC that will enable the company to offer customers a low-cost alternative to ceramic packages for VLSI VLSI: see integrated circuit. (1) (Very Large Scale Integration) Between 100,000 and one million transistors on a chip. See SSI, MSI, LSI and ULSI. (2) (VLSI Technology, Inc., Tempe, AZ, www.semiconductors. circuits. The deal will give customers who use the MOSIS multi-project wafer (MPW MPW Macintosh Programmer's Workshop (Mac OS Software Development Environment) MPW Multi Product Wafer MPW Maine Photographic Workshops (Rockport, Maine) MPW Multiple Plane Wave MPW Multi-Purpose Workstation ) service access to QFN/MLP, QFP (Quad FlatPack) A square, surface mount chip package that has leads on all four sides and comes in several varieties. PQFP (Plastic QFP) may refer to all of the following QFP types. All quad flatpacks use gull-wing leads, except for the CQFP, which stick straight out. and SOIC/SSP packages from SEMPAC's Open-Pak[TM] product line. These pre-molded, air cavity packages meet the latest JEDEC The division of the Electronic Industries Alliance (EIA) that deals with semiconductor standards (officially, the JEDEC Solid State Technology Association of EIA). JEDEC was formed in 1958 when the Joint Electron Tube Engineering Council (JETEC) split into two Joint Electron Device outline and footprint standards. This means that devices can be designed for high volume production with streamlined testing to further reduce costs. Open-Pak packages are made from semiconductor-grade plastics. They have copper lead frames that are gold plated to military standards. As a result, the packages are mechanically stable with similar electrical characteristics to fully encapsulated, molded types. The MOSIS MPW service allows multiple products to be fabricated on each mask set A mask set is a series of electronic data that define geometry for the photolithography steps of semiconductor fabrication. Each of the physical masks generated from this data are called a photomask. and silicon wafer; cost sharing is based on the physical area used by each design. Both integrated device manufacturers (IDMs) and fabless semiconductor companies use MPW services to dramatically reduce chip development costs when they need a few tens of samples for evaluation. However, the service is equally cost-effective for low volume production, typically up to 1000 pieces of each device. When device evaluation is complete, migration to a dedicated wafer run for high volume production is easily realized. Commenting on the SEMPAC deal, MOSIS deputy director, Wes Hansford, said, "Our service is about enabling innovation amongst semiconductor businesses, particularly in an environment where shrinking chip geometries mean that dedicated mask sets and wafers are not affordable for some designs. Reducing the cost of packaging without compromising performance or reliability through this agreement is one more way in which we can help our customers attain their new product development goals quickly and economically." SEMPAC packaging is available through MOSIS now and more information on the available options can be found at http://www.mosis/com/sempac. |
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