MIPS Technologies Names Renowned Industry Veteran Keith Diefendorff Vice President of Product Strategy.

Business Editors

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Jan. 14, 2002

Former PowerPC Architect, Editor-in-Chief of Microprocessor

Report To Guide MIPS Technologies Product and SOC Strategies

MIPS Technologies, Inc. (Nasdaq: MIPS, MIPSB), a leading provider of industry-standard processor architectures and cores for digital consumer and network applications, today announced that renowned microprocessor industry veteran Keith Diefendorff has been appointed to the newly created position of vice president of product strategy. In his new role, Diefendorff will help guide the ongoing development of the company's product and system-on-chip (SOC) strategies to maintain MIPS Technologies presence as the premier low-power, high-performance embedded microprocessor vendor within the embedded electronics industry.

Diefendorff brings to MIPS Technologies more than twenty years of microprocessor development experience at leading semiconductor companies such as Texas Instruments, AMD and Motorola. At Motorola Diefendorff was chief architect of the PowerPC. He also is well known in the industry for his work as the editor-in-chief of Microprocessor Report, which is widely recognized as the preeminent source for technical product information for hardware design engineers involved in SOC design.

"Keith's extensive experience in the microprocessor industry has given him a level of recognition and expertise that few possess," said John Bourgoin, chairman and CEO of MIPS Technologies. "His savvy, insight, and technical know-how are already being leveraged to develop technologies and strategies that will ensure our customers continue to have the best performance and time-to-market advantages using MIPS-based products. He is a welcomed addition to our team."

"In addition to being known as the performance leader within embedded electronics, MIPS Technologies has the most versatile and scalable processor architecture in the intellectual property business today, and I intend to help define some truly compelling products around that architecture," said Diefendorff. "There are many exciting devices being designed for the embedded processing market, and I believe MIPS Technologies will continue its leadership as a major technology supplier to this industry."

Prior to joining MIPS Technologies, Diefendorff was the chief engineer and vice president of research at ARC Cores, where he helped define the company's configurable architecture. Before ARC, he spent two years as a senior analyst at Cahners MicroDesign Resources, the world's leading research firm covering advanced microprocessor architecture and the publisher of Microprocessor Report, of which he was editor-in-chief. From 1996 to 1998, Diefendorff was a distinguished scientist and the director of processor architecture and strategy at Apple Computer. At Apple he led the effort to define AltiVec, the multimedia vector instruction-set extension to PowerPC. Previously, he was director of technical strategy at NexGen, and then AMD after it acquired NexGen, where he worked on the Nx586, K6 and follow-on x86-compatible microprocessors.

During his tenure at Motorola, from 1988 to 1995, Diefendorff was a senior member of the technical staff and chief architect of various microprocessors. He was on the negotiating team that created the PowerPC partnership and was a member of the small select group of Apple, IBM, and Motorola architects that defined the PowerPC instruction-set architecture. From 1991 to 1995, he served as Motorola's official representative to the PowerPC architecture committee.

Diefendorff began his career in 1975 at Texas Instruments, where he spent 13 years designing processors for minicomputers and workstations.

Diefendorff holds a master of science degree in electrical engineering from the University of Akron and graduated with a bachelor's degree, magna cum laude, from Kent State University. He holds 11 U.S. patents.

About MIPS Technologies

MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and network applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at [phone] or www.mips.com.

MIPS(R) is a registered trademark of MIPS Technologies, Inc. in the United States and other countries. All other trademarks referred to herein are the property of their respective owners.