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MIPS Technologies Licenses 32-Bit Processor Cores to Metalink for Next-Generation Broadband Access Solutions.


Business Editors/High-Tech Writers

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--April 7, 2003

MIPS Technologies (MIPS Technologies, Inc., Mountain View, CA, www.mips.com) Founded in 1984 as MIPS Computer Systems Inc., the company merged with SGI in 1992 and spun off as an independent entity once again in 2000. , Inc. (Nasdaq: MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. , MIPSB)

Utilization of CorExtend(TM) Capability Improves Performance for

Faster Code Execution

MIPS Technologies, Inc. (Nasdaq: MIPS, MIPSB), a leading provider of industry-standard processor architectures and cores for digital consumer and business applications, announced today that Metalink has taken a license for the MIPS32(TM) M4K(TM) core and the MIPS32 4KEc(TM) core with CorExtend capabilities. By incorporating these powerful 32-bit cores into its broadband applications, Metalink builds on its portfolio of innovative MIPS-based(TM) products by continuing to offer cost-effective solutions for the dynamic and challenging telecommunications market worldwide.

Metalink will use the M4K and 4KEc cores, as it has done with the 4Km(TM) core, in combination with its universal software programming interfaces. This unified architecture, called the Olympus-DSL(TM) platform, supports multiple industry standards including VDSL See DSL.

VDSL - Very high bit-rate Digital Subscriber Line
, SHDSL SHDSL Single-Line High-bit-rate Digital Subscriber Line
SHDSL Symmetrical High-Density Digital Subscriber Line
SHDSL Symmetrical High Bitrate Digital Subscriber Line (Ericsson)
SHDSL Symmetrical Highspeed Digital Subscriber Loop
, HDSL See DSL.

HDSL - High bit-rate Digital Subscriber Line
2, HDSL4, SDSL See DSL.

SDSL - Single-line Digital Subscriber Line
, and HDSL. Customers, who have already adopted Metalink's Olympus-DSL platform, are top-tier worldwide vendors.

"We evaluated several RISC RISC
 in full Reduced Instruction Set Computing

Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s.
 cores, considering the core performance and capabilities necessary for our application, and found MIPS' cores most suitable for our requirements," said David Pereg, vice president of engineering at Metalink. "Having the option to define our own instructions with the CorExtend capabilities in the 4KEc core gives us a significant performance advantage, allowing us to minimize the required memory space and enable faster execution."

"Metalink has been developing a compelling line of MIPS-based networking products for several years. By applying their intimate knowledge of the broadband access See broadband and wireless broadband.  market and exploiting the capabilities of the CorExtend technology, they can add functions that boost performance and optimize their application in ways that aren't possible with other industry-standard cores," said Jack Browne, vice president of worldwide sales at MIPS Technologies. "We look forward to their continued worldwide leadership and innovation in the networking space."

About the MIPS32 M4K core

Featuring a typical clock speed over 300 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. , yet minimum power consumption of only 0.10 mW/MHz and core size as small as 0.3 mm2 in 0.13-micron processes, the MIPS32 M4K core gives designers more performance and greater flexibility to achieve higher system throughput while controlling silicon cost. The flexibility and re-programmability enables upgrades in software as protocol specifications or market requirements evolve. Other features include bit field instructions for easier handling of packet information, support for vectored interrupts to decrease interrupt latency, and multiple register sets for faster context switching.

About the MIPS32 4KE core family

The 4KE family not only offers 1.35 Dhrystone MIPS/MHz, but with the CorExtend capabilities it also provides configurable features that increase performance while reducing die size and power consumption and, ultimately, total system cost. Features such as 128 kilobytes of cache and a coprocessor coprocessor

Additional processor used in some personal computers to perform specialized tasks such as extensive arithmetic calculations or processing of graphical displays.
 interface allow users to easily configure a 4KE core to maximize performance in their system-on-chip (SoC) applications. MIPS16e(TM) code compression can reduce memory requirements by up to 40 percent, and extensive clock gating significantly reduces power consumption.

About MIPS Technologies

MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at 650/567-5000 or www.mips.com.

MIPS is a registered trademark in the United States and other countries, and MIPS32, MIPS16e, 4Km, 4KEc, M4K, CorExtend, and MIPS-based are trademarks of MIPS Technologies, Inc. Olympus-DSL is a trademark of Metalink, Ltd. All other trademarks referred to herein are the property of their respective owners.

Note to Editors: In "0.3 mm2" mentioned in the fourth paragraph of this release, the 2 should be read as superscript Any letter, digit or symbol that appears above the line. For example, 10 to the 9th power is written with the 9 in superscript (109). Contrast with subscript. .
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Apr 7, 2003
Words:658
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