MIPS Technologies Announces Availability of Fastest Licensable Core.

Business Editors/High-Tech Writers

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Feb. 13, 2002

600-MHz MIPS64(TM) 20Kc(TM) Core Delivers Highest Performance

Available for Applications Such as Home Gateways, Automotive

Telematics and Office Automation

The embedded processor industry's highest performance licensable processor core is now available to customers for design starts, MIPS Technologies, Inc. (Nasdaq:MIPS)(Nasdaq:MIPSB) announced today. The 64-bit, 600-MHz MIPS64(TM)20Kc(TM)hard core at a 0.13-micron fabrication process achieves performance of 1370 Dhrystone 2.1 MIPS (with inlining). The 20Kc microarchitecture is scalable to 1 GHz in a 0.10-micron process. The core already is available at 400 MHz in TSMC's 0.18G-micron process.

The superscalar 20Kc core gives semiconductor suppliers and OEMs the highest system performance available for cost- and power-sensitive applications such as multimedia home gateways, automotive telematics, networking, office automation and game consoles. The core's processing power allows systems designers to reduce end product cost by integrating in software many features traditionally handled by dedicated hardware blocks. The 20Kc core also meets and exceeds emerging standards and feature requirements in applications such as set-top boxes, residential gateways and high-end printers.

"The MIPS64 20Kc core provides the most flexible capability to deliver performance due to its proven clock frequency and its implementation of the MIPS 64-bit ISA," said Cary Snyder, senior analyst at MicroDesign Resources and senior editor of Microprocessor Report.

"We have just dramatically reduced the time to market for designers of the most sophisticated SOCs for the next generation of systems," said Keith Diefendorff, vice president of product strategy at MIPS Technologies. "The 20Kc core is the industry's highest performance licensable hard core, but it still offers the low-power characteristics and low overall system cost that are so important for embedded applications. It is fully compatible with our 32-bit core family, giving our customers a seamless migration path to the higher performance world of 64-bit processing. They also have access to a total system solution, including major operating systems, development tools and software applications."

Features

Features of the 20Kc core include:

-- Dual-issue, superscalar, 7-stage pipeline.

-- Integer and floating-point performance unprecedented for a licensable core.
Its 64-bit dual-issue integer capability and double-precision IEEE-754
floating-point unit (FPU) allow the core to achieve a performance of 1370
Dhrystone 2.1 MIPS (with inlining) and peak 2.4 Gflops at 600 MHz.

-- SIMD (single-instruction, multiple data) instructions in the FPU that
greatly accelerate the processing of large data streams, eliminating the need
for a separate DSP and thereby lowering the cost of the end product.

-- Power dissipation of 1.5 watts for the full core at 600 MHz, at 1.0 volt.

-- Core size is a small 8 mm (squared). With two 32-Kbyte caches, memory
management unit and floating-point unit, core size is 20 mm (squared).

The 20Kc core also features a new, high-bandwidth interface, the MGB(TM) Link, to help eliminate performance bottlenecks. This gives designers an industry-leading, peak 3.6-Gbytes per second interface in an SOC environment, a significant benefit when moving very large data streams and graphics files. The MGB Link is designed to scale to meet future throughput needs by allowing for wider bus widths and higher clock speeds.

Customer Endorsements

"The scalability, high-performance, ease of integration, and low-power features of the MIPS architecture make it ideal for high-end, next-generation SOC applications," said Kathy Tobin, Consumer ASIC Business Unit manager at Agilent. "The 20Kc gives us the ability to address today's very demanding applications with solutions that allow our customers to develop superior products."

"NEC is committed to driving 64-bit embedded applications in the marketplace and offers a full range of 64-bit processors and cores," said Karl Auker, assistant general manager, VR Micro Strategic Business Unit, NEC Electronics Inc. "Our 20Kc-based processors will target a wide range of performance-oriented systems, including future digital consumer, office automation and automotive telematics products." NEC has been a MIPS licensee for more than 10 years and has achieved major design wins for its MIPS-based 64-bit VR Series(TM) processors, including the Nintendo 64(R) game console, HP and Lexmark laser printers, advanced set-top boxes from Motorola and Sony, and Cassiopeia(TM) handheld PCs.

Other leading companies committed to the MIPS 64-bit architecture include Broadcom and Toshiba.

"Broadcom's strategic commitment to the MIPS architecture began several years ago with our license to the 32-bit MIPS architecture. We further strengthened our commitment with a 64-bit ISA license. The MIPS 64-bit architecture, in particular, meets the extreme performance and power requirements that leading-edge broadband processors demand," said Dan Dobberpuhl, vice president and general manager of Broadcom's Broadband Processor Business Unit. "The company's latest MIPS64-based processor is the SiByte BCM1250, a dual-core SOC solution that incorporates two 64-bit MIPS CPUs which scale from 600-MHz to 1-GHz clock speed."

"Toshiba has a long history developing products based on 64-bit MIPS technology. With the 600-MHz 20Kc core, yet another stable, proven microarchitecture has become available at the high end of the MIPS roadmap," said Yutaka Murao, senior manager, RISC Technical Marketing, Microprocessor Division, Toshiba Semiconductor Company.

Comprehensive Support

The MIPS architecture is one of the most widely supported of all processor architectures. The MIPS64 architecture, in particular, is supported by, Java, Linux(R), VxWorks and Windows CE .NET. In fact, the only 64-bit processors that are currently supported by Windows CE .NET are based on the MIPS architecture.

"OEMs are looking for high-performing, low-power processors for their small-footprint, wireless Windows Powered devices," said Keith White, senior director of marketing for the Embedded and Appliance Platforms Group at Microsoft Corp. "The robust multimedia features of Windows CE .NET in combination with MIPS Technologies' 20Kc technology will enable OEMs to rapidly develop smart, affordable, devices that create a rich, personalized experience for consumers."

Development tools and applications software are available from numerous third-party suppliers, including Algorithmics, Green Hills Software, Mentor Graphics, Microsoft, MontaVista, Red Hat and Wind River. In addition, the MIPS(TM) Alliance Program ensures the availability of critical hardware and software such as 802.11, Bluetooth, MPEG-2, MPEG-4, audio algorithms, ATM (asynchronous transfer mode), VoIP and networking protocol stacks. The MIPS Malta(TM) development kit, which is well supported by the ISV community, will be available with the 20Kc core later this quarter.

"Systems developers working with the 20Kc core, or any MIPS-based processor, are assured of comprehensive development support that enables them to quickly get their next-generation products to market," said John Carbon, vice president of marketing at Green Hills Software. "Both companies recently announced a jointly developed, fully integrated, end-to-end tool chain that gives developers a best-in-class application development environment optimized for the MIPS32 and MIPS64 architectures."

Online Seminar

MIPS Technologies held an online technical seminar on Feb. 12 in which Keith Diefendorff and Liam Madden, vice president of high-performance processors, showed how to design embedded SOCs using the 20Kc core. The presentation will be archived for six months at www.mips.com and www.netseminar.com.

About 64-Bit Architecture

The growth in 64-bit processing is fueled by demand for features such as streaming audio and high-definition video for small and large displays, cryptography enhancements for e-commerce, better power efficiency and battery life in handheld devices, and the convergence of computing, communications, multimedia and encryption in new types of information appliances. MIPS Technologies began developing its 64-bit processor architecture more than 10 years ago, based upon the leading-edge RISC (reduced instruction set computer) research of MIPS co-founder John Hennessey, currently the president of Stanford University. Today, MIPS Technologies offers a variety of 64-bit cores and is the only company to license a 64-bit architecture and 64-bit cores. More than a dozen leading companies, including NEC, Toshiba, Broadcom, PMC-Sierra, IDT, and LSI Logic have successfully deployed this technology in a variety of consumer and networking applications, including the Sony PlayStation(R) 2 computer entertainment system, HP laser printers, set-top boxes and broadband networking devices.

About MIPS Technologies

MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and network applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at [phone] or www.mips.com.

Note to Editors: MIPS(R) is a registered trademark in the United States and one or more other countries, and MIPS64(TM), 20Kc(TM), MIPS32(TM), MIPS-based(TM), MGB(TM) and Malta(TM) are trademarks of MIPS Technologies, Inc. All other trademarks referred to herein are the property of their respective owners.