MIPS Technologies, Inc. and Alchemy Microprocessor Design Group Announce Strategic Relationship.

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--April 8, 1999--

Former StrongARM Team Driving a New Venture to Develop High

Performance, Low Power MIPS-based(TM) Designs

MIPS Technologies, Inc. (Nasdaq:MIPS) and Alchemy Microprocessor Design Group (Alchemy), a unit of Cadence Design Systems, Inc. (NYSE:CDN), today announced a strategic relationship in which MIPS Technologies is to provide Alchemy a license for its architecture.

Under the terms of the MIPS Technologies agreement, Alchemy will provide standard system-on-chip (SOC) products based on the MIPS architecture to OEMs in the digital consumer marketplace, specifically targeting the emerging third-generation (G3) of wireless digital phones.

Cadence and Alchemy have developed a plan to form the group into a private company. Cadence will continue to fund the operations of Alchemy and expects to maintain an equity position in the new company. Currently, Cadence and the Alchemy group are in advanced discussions with venture firms about the investment opportunity.

"We congratulate Alchemy as it embarks on its new venture, and we are delighted the team selected the MIPS architecture," said John Bourgoin, chairman and CEO of MIPS Technologies, Inc. "By teaming Alchemy's systems and chip expertise in low power with the MIPS architecture, high volume, low power embedded markets will benefit."

Rich Witek, former StrongARM and Alpha architect, and Greg Hoeppner, former Director of StrongARM Development, head the Alchemy development team. While at Digital Equipment Corporation, the development team was responsible for the StrongARM family of processors, including the 110 CPU and StrongARM 1100 SOC. The team's expertise in low power, low cost system design will enable it to develop a range of high performance solutions for a variety of consumer products.

The agreement with MIPS Technologies will allow Alchemy to use a market-leading industry standard architecture in SOCs targeted at G3 wireless digital phones, Window CE clam-shell and palm-size computers, real-time embedded systems, and Auto PC systems. Working with MIPS Technologies, Alchemy will develop system solutions where higher levels of performance and longer battery life are required.

Alchemy plans to develop high-performance MIPS-based(TM) processor cores all at power levels below 0.5 watt and expects the first products to be available next year for select consumer markets. Alchemy will work with MIPS Technologies and other third parties to provide complete hardware and software solutions. Customers will be able to use existing industry-standard software development tools and verification systems that should allow them to rapidly develop SOC solutions. The companies will also work with customers to define application specific and customer-specific uses of these platforms.

"Alchemy has a highly experienced microprocessor development team, and we believe that this presents an opportunity to expand the MIPS architecture," said Derek Meyer, vice president of marketing and sales for MIPS Technologies, Inc. "We expect SOC will be critical in a wide variety of future consumer products for communications and user interface applications, and Alchemy looks to be well positioned to develop integrated solutions."

"The MIPS architecture is well suited to networking, portable Windows CE and digital consumer applications. By using MIPS Technologies' architecture, we expect to develop a range of high performance, low power solutions," said Phil Pompa, vice president of marketing for Alchemy. "Our goal is to permit customers to take advantage of the performance of MIPS-based products in an integrated single-chip low power solution."

Alchemy's development efforts are based on Cadence's electronic design software and methodologies. Using Cadence's family of system and chip design solutions, Alchemy is able to integrate the microprocessor core and various system components all on single chip, while targeting low power, compact designs for leading-edge fabrication processes.

MIPS Technologies, Inc. is a primary architect of embedded 32- and 64-bit RISC processors. The company drives a broad architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. It is the only company that owns a 64-bit architecture in processors that are currently being sold to digital consumer product manufacturers in high volume. The company licenses its intellectual property to semiconductor manufacturing companies, ASIC developers, and system OEMs. MIPS Technologies, Inc. and its licensees offer a wide range of robust, scalable processors in standard, custom, semi-custom and application-specific products. Developers can choose from a broad menu of price/performance options that include execution units, clock speeds, instruction widths (16-, 32- or 64-bit), cache sizes, memory bandwidths, memory protection schemes, system interfaces, and on-chip system logic.

Licensees currently include: Broadcom Corporation; CommQuest (IBM); Integrated Device Technology, Inc. (IDT); LSI Logic Corporation; Macronix; NEC Corporation; NKK Corporation; Philips Semiconductors; Quantum Effect Design, Inc. (QED); Sony Corporation; Synova; Texas Instruments Incorporated, and Toshiba Corporation. Numerous companies utilize MIPS intellectual property. MIPS Technologies, Inc. is based in Mountain View, California, and can be reached at 650/567-5000 or http://www.mips.com.

This release contains forward-looking statements based on current expectations or beliefs, as well as a number of assumptions about future events, that are subject to factors and uncertainties that could cause actual results to differ materially from those described in the forward-looking statements. The reader is cautioned not to put undue reliance on these forward-looking statements, which are not a guarantee of future performance and are subject to a number of uncertainties and other factors, many of which are outside the control of MIPS Technologies, Inc. and Cadence Design Systems, Inc. Risks about the companies' businesses are detailed from time to time in their respective Securities and Exchange Commission reports, including the Annual Report on Form 10-K for the year ended June 30, 1998 and Form 10-Q for the quarter ended September 30, 1998 and December 31, 1998 for MIPS Technologies, Inc., and the Annual Report on Form 10-K for the year ended January 2, 1999 for Cadence.

Note to Editors: Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. MIPS is a registered trademark and MIPS-based is a trademark of MIPS Technologies, Inc. All other trademarks are the property of their respective companies. All press materials are available on the World Wide Web via: http://www.mips.com/