LogicVision and MoSys Partner to Deliver Embedded Test and Repair Analysis for Embedded 1T-SRAM Memories.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Dec. 3, 2001

Embedded Test and Repair Analysis Accelerates Time-to-Market

and Reduces Manufacturing Cost

LogicVision, Inc. (Nasdaq:LGVN), a leading provider of embedded test solutions, and MoSys, Inc. (Nasdaq:MOSY), the industry's leading provider of high density SoC embedded memory solutions, today announced their collaboration to qualify and deliver embedded test and built-in repair analysis for the MoSys 1T-SRAM(R) family of high-density embedded memories.

MoSys and LogicVision have already verified the integration and implementation of LogicVision's Memory BIST and top-level test assembly technologies on MoSys 1T-SRAM embedded memories. The embedded memory block was exercised through the LogicVision design flow using the IC Memory BIST and Chip Test Assemble products and was shown to be compatible and interoperable with the flow.

A built-in repair analysis capability has been developed which complements the compatibility activities undertaken by MoSys and LogicVision. This capability, when deployed with MoSys 1T-SRAM embedded memory macros, provides a "built-in" means to analyze the embedded memory macro for redundancy repair purposes.

"With SoCs becoming more complex and demanding correspondingly ever larger and denser embedded memory modules, the need for integrated embedded test and analysis also becomes increasingly important," said Rodger Sykes, LogicVision's vice president of marketing and business development. "Our focus on delivering an integrated approach to SoC test and analysis underscores the importance of our collaborative initiative with industry-leaders such as MoSys, with their successful 1T-SRAM highly-dense embedded memory family. The MoSys-LogicVision partnership is a significant step in both companies' efforts to deliver test-efficient usable cores to the SoC marketplace."

"In addition to the proven savings delivered by the higher density and yield of 1T-SRAM memory, cooperating with leading embedded test suppliers such as LogicVision delivers additional savings to our customers," noted Mark-Eric Jones, MoSys' vice president and general manager of intellectual property. "The embedded test and analysis functions provided by LogicVision combined with a built-in repair analysis capability streamline the testing and built-in analysis of the memory for redundancy repair."

The interoperability of the MoSys 1T-SRAM embedded memory cores with the LogicVision embedded test products is highlighted in a joint application note available to customers of LogicVision and MoSys products. Availability of the full-embedded test and built-in repair analysis solution is scheduled for 4Q01.

About MoSys, Inc.

Founded in 1991, MoSys develops, licenses and markets innovative memory technology for semiconductors. MoSys' patented 1T-SRAM technology offers a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM technology results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technology also offers the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, this technology can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making it an ideal technology for embedding large memories in System on Chip (SoC) designs. 1T-SRAM technology is in volume production both in SoC products at MoSys' licensees as well as in MoSys' standalone memories. MoSys is headquartered at 1020 Stewart Drive, Sunnyvale, Calif. 94085. More information is available on MoSys' website at www.mosys.com.

About LogicVision Inc.

LogicVision provides proprietary technologies for embedded tests that enable the more efficient design and manufacture of complex semiconductors. LogicVision's embedded test solution allows integrated circuit designers to embed into a semiconductor design test functionality that can be used during semiconductor production and throughout the useful life of the chip. For more information on the company and its products, please visit the LogicVision website at www.logicvision.com.

      ACRONYMS AND DEFINITIONS:

ATE:  Automatic Test Equipment
ATPG: Automatic Test Pattern Generation
BIST: Built-in-Self-Test
DFT:  Design-for-Test
EDA:  Electronic Design Automation
GUI:  Graphics User Interface
HDL:  Hardware Description Language
IC:   Integrated Circuit
RTL:  Register Transfer-Level
VHDL: VHSIC (Very High-Speed Integrated Circuit) HDL
IP:   Intellectual Property
SoC:  System-on-chip

FORWARD LOOKING STATEMENTS:

Except for the historical information contained herein, the matters set forth in this press release, including statements as to the expected availability of the full-embedded test and built-in repair analysis solution, are forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially, including, but not limited to, the ability of the companies to integrate their technologies to develop the solution, and other risks detailed in LogicVision's Prospectus dated October 31, 2001 filed with the SEC and from time to time in LogicVision's SEC reports. These forward-looking statements speak only as of the date hereof. LogicVision disclaims any obligation to update these forward-looking statements.

Note to Editors: LogicVision, Embedded Test, LogicVision Ready and LogicVision logos are trademarks or registered trademarks of LogicVision Inc. in the United States and other countries. All other trademarks and service marks are the property of their respective owners.