Lexra Announces LX5380 - The First Core for Designs Requiring Both RISC and DSP; Memory Management and Sheer Speed Give the LX5380 The Competitive Advantage.

Business Editors/Technology Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 16, 2001

Lexra, a leading developer of system-on-chip (SOC) processor cores, today announced the LX5380. Targeted to operate at 420 MHz in a 0.13-micron process, it is the fastest 32-bit RISC-DSP core available. The LX5380 RISC-DSP core executes the MIPS(R) I(a) instruction set, with Radiax(TM)2 DSP extensions. The LX5380 speed, together with its sophisticated Memory Management Unit (MMU), for the first time enables all RISC and DSP tasks to run in a single core.

"With the LX5380 announcement we once again set the performance benchmark in the embedded RISC-DSP market," says Charlie Cheng, President and CEO of Lexra. "New internet-enabled applications like 3G wireless handsets and VoIP gateways require a mix of both RISC and DSP tasks. The new BlackFin(TM) chip from Analog Devices validates Lexra's strategy of a single core executing both RISC and DSP tasks. The difference is that we offer comparable technology in a licensable core, as opposed to a fixed, merchant market chip."

Performance Targets:

The LX5380 is aimed at two classes of applications: first, the most cost and power sensitive applications such as 3G wireless handsets and second, high-performance multi-channel applications such as VoIP gateways. All the functions of a 3G wireless handset with features like video conferencing, speakerphone and MP3 player can be performed by a single LX5380 core. The LX5380's Memory Management Unit (MMU) permits the DSP tasks to run under major operating systems that provide the robust protection required to run 3rd party applications on an open platform. Furthermore, the LX5380's high performance is sufficient for all tasks to be run on a single core.

"The LX5380 also efficiently enables high-performance applications that demand a multi-channel design," says Pat Hays, Co-Founder and CTO of Lexra.

The DSP processing requirement for an 8-channel VoIP solution takes 266 MHz of the LX5380's 420 MHz bandwidth. A CPE chip with one LX5380 core supports up to eight channels; a chip with four cores supports over 24 channels for higher-end SoHo gateways.

According to Pat, "Multi-processing based on the LX5380, is a scalable area-efficient architecture for VoIP gateways all the way up to enterprise class."

Technical Features:

To support these applications the LX5380 introduces important new features. The LX5380 uses a 7-stage execution pipeline--the first in a licensable RISC-DSP architecture--to achieve higher clock speed. A Memory Management Unit (MMU) and improved data caches enable embedded systems to run sophisticated operating systems such as Windows CE, Linux(R), VxWorks(R), OSE(TM) and EPOC.

Another feature boosting performance is the new Block Move Controller (BMC) and associated block-move instruction. For processing digitized voice and data packets, the BMC can transfer samples in the background while the DSP processes data in the foreground. In addition, 20 new instructions have been added to Radiax(TM) Lexra's DSP extension to the MIPS I ISA. The new Radiax(TM)2 instructions were derived from the extensive experience of Lexra, its customers and software partners over the past two years. As a result, Radiax-2 offers improved bit-field operations for packet processing, improved support for 32-bit precision for high fidelity audio as well as other DSP performance optimizations.

Specification, Pricing, and Availability:

Lexra's LX5380 is targeted for 0.13-micron process technologies. In a typical 0.13-micron ASIC process at TSMC or UMC, a baseline configuration occupies 1.9 mm2 in silicon area without memories, and delivers 420 MHz with typical semiconductor process parameters, worst-case commercial operating conditions. It delivers 360 MHz under worst-case process, worst-case commercial operating. Power dissipation for a basic configuration of the core is 0.2mW/MHz worst case.

The first customer shipment of the LX5380 will be in March of 2002. General availability will occur in Q2, 2002. The single project license fee for RTL is $535,000 with a $1.10 royalty per chip for up to 100k-unit quantity.

About Lexra:

Lexra, Inc. is a leading microprocessor developer specializing in 32-bit RISC, RISC-DSP and NPU cores for the embedded market. In less than four years, the company has established itself as an innovator in embedded microprocessor technology and the intellectual property (IP) licensing business model, with a proven track record for customer success. During this short period, Lexra has delivered seven different processor architectures to over 30 licensees in six different countries. Its customers are among the top ten semiconductor companies. Lexra is headquartered in San Jose California. Further company information can be found at http://www.lexra.com.

Note (a): MIPS, MIPS I, and other MIPS common law marks are trademarks and/or registered trademarks of MIPS Technologies, Inc. Lexra, Inc. is not associated with MIPS Technologies, Inc. in any way. Unaligned loads & stores are not supported in hardware or software.

Radiax is a trademark of Lexra, Inc. All other trademarks are the property of their respective owners.