Lexra Announces 0.15 Micron Generation RISC Core; The LX4189 Removes Memory Bottlenecks Created by Traditional RISC Cores.

Business Editors & Technology Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--April 24, 2000

Lexra, a leading developer of processor cores for embedded applications, announced today the LX4189, a high performance 32-bit RISC core optimized for 0.15 micron silicon processes.

The LX4189 is especially targeted at communications applications where performance in the most advanced process is critical. The LX4189 will be shipping by the end of Q2, 2000.

State-of-the-art RISC cores such as the ARM9 and MIPS Technologies 4K series are based on architectures invented in the early 1980s. These architectures were optimized for the 3 micron process technology in use at the time. At today's 0.18 micron processes and below, and with the growing complexity and size of software programs, a different architecture is needed to take full advantage of the silicon technology.

"We are very excited to once again take the performance lead in the 32 bit RISC core market," said Charlie Cheng, president and CEO of Lexra. "The LX4189 will be the first synthesizable core to extend the MIPS ISA into very high clock speed ASICs."

LX4189 Overview:

In communication processing applications, instruction memory can be very large -- as large as 48Kbytes. In order to accommodate such memory size and still keep the clock speed high, the processor must do more in parallel.

At the heart of the LX4189 is a new central processing unit (CPU) with a 6-stage pipeline. The newly-added pipeline stage is dedicated to instruction memory access. This allows the LX4189 to access more memory, while keeping the clock frequency high for high throughput.

With a carefully rearranged the pipeline design, the LX4189 has shown itself to be almost 30 percent faster than other five-stage RISC cores such as ARM9S and MIPS 4K. In fact, at 0.15 micron, the LX4189 can push the clock speed to 266 MHz (worst case process, industrial temperature) without using full custom circuit designs.

"The LX4189 is just the beginning of Lexra's push into high performance cores," said Pat Hays, CTO of Lexra. "We believe the LX4189 is the foundation from which we will derive a new family of RISC cores aimed at the communications market space."

The LX4189 will deliver the 266 MHz clock speed with just 1 square millimeter of die area in 0.15 micron silicon process. In addition, it also comes with an optional high performance MAC (Multiply Accumulate Unit) for DSP related applications.

LX4180 and LX4189 Comparison:

The LX4180 and LX4189 are optimized for two different market segments. The LX4180 is targeted at traditional 8-bit and 16-bit customers who would like to move into an ultra small die area 32-bit core, but do not need to push clock speed beyond 166 MHz (worst case process, industrial temperature). The LX4189, on the other hand, is designed specifically for packet processing, voice-over-IP and DSL modem applications, where clock speed is critical for the wire-speed throughput of the system. The two products are source and object code compatible, and will share most of the system level building blocks as well as development tool support.

Pricing and Availability:

Lexra's LX4189 began first customer shipment (FCS) in Q1, 2000. General availability will occur in Q2, 2000. Single project license fee for RTL is $350,000.

About Lexra:

Lexra, Inc. is a leading microprocessor developer specializing in RISC and DSP cores for the embedded market. In addition to competitive performance, small die size and low power consumption, Lexra's processor cores are also easy to use, easy to port and provide customers with cost effective solutions. Lexra is headquartered in Waltham, Mass. Further information can be found at http://www.lexra.com.

MIPS, MIPS I, MIPS16, R3000, and other MIPS common law marks are trademarks and/or registered trademarks of MIPS Technologies, Inc. Lexra, Inc. is not associated with MIPS Technologies, Inc. in any way. Unaligned loads & stores are not supported in hardware.