Lattice Semiconductor and Mentor Graphics Extend OEM Agreement.Business Editors & Technology Writers HILLSBORO, Ore.--(BUSINESS WIRE)--Nov. 26, 2001 ispDesignEXPERT and Future Lattice Design Tools Will Continue to Include LeonardoSpectrum Synthesis and ModelSim RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; and Timing Simulation Tools Lattice Semiconductor Corporation (Nasdaq:LSCC LSCC Lake-Sumter Community College (Florida) LSCC Lattice Semiconductor Corporation (stock symbol) LSCC Lawson State Community College (Alabama) ) and Mentor Graphics Corporation (Nasdaq:MENT) today announced the extension of their OEM (Original Equipment Manufacturer) The rebranding of equipment and selling it. The term initially referred to the company that made the products (the "original" manufacturer), but eventually became widely used to refer to the organization that buys the products and agreement. Under the agreement, Lattice will continue to bundle the Mentor Graphics(R) LeonardoSpectrum(TM) synthesis tool and custom versions of the ModelSim(R) tool with Lattice's ispDesignEXPERT(TM) programmable logic device See PLD. (PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user. ) design tools. The Lattice and Mentor Graphics tools are fully integrated and provide users with leading design performance and the ease-of-use in a single flow to support all of Lattice's programmable logic device families, including the ispMACH(R), ispLSI(R), ispGDX(R), ispGAL(R) and GAL(R) device families. "LeonardoSpectrum and ModelSim have been a powerful part of Lattice's tools solution," said Stan Kopec, vice president of corporate marketing for Lattice Semiconductor. "This extension allows us to continue to provide best-in-class tools that complement our leading-edge silicon portfolio. Users demand these tools in parallel with our new silicon releases to continue innovation in their competitive markets." "We are pleased that Lattice has extended their OEM relationship with Mentor Graphics. Our continued partnership demonstrates Mentor Graphics' commitment to providing the most comprehensive PLD front-end design solutions available," said Anne Sanquini, vice president and general manager of the HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. Design division, Mentor Graphics. "Integrating ModelSim and LeonardoSpectrum into Lattice's design tools provides the enhanced performance and faster time-to-market demands required by its customers." Lattice, the inventor of In-System Programmability, holds a dominant position in the 3.3V CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. market with its extensive portfolio of innovative SpeedLOCKED, SuperBIG, SuperFAST, and SuperWIDE ISP (1) See in-system programmable. (2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines. (TM) architectures. The ispDesignEXPERT software, supporting the complete line of Lattice digital devices, is tightly integrated with Mentor Graphics tools to supply powerful out-of-the-box solutions for every design need. The Mentor Graphics ModelSim mixed-language HDL simulator tool is aimed at today's multi-million gate ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. designs. The need to detect errors in the development cycle, before synthesis and place and route, becomes increasingly important in improving engineering productivity. ModelSim Lattice Edition enables VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog testbench design verification, allowing Lattice users to simulate the design based on system-level VHDL and Verilog specification. The LeonardoSpectrum synthesis tool allows Lattice users to create PLD designs in VHDL or Verilog using one synthesis environment. Mentor's LeonardoSpectrum Lattice Edition provides Lattice PLD designers with industry-leading synthesis technology targeted for Lattice devices. Combining push-button (electronics) push-button - A roughly fingertip-sized plastic cover attached to a spring-loaded, normally-open switch, which, when pressed, closes the switch. Typical examples are the keys on a computer or calculator keyboard and mouse buttons. ease-of-use features and sophisticated design strategies, Lattice designers can carefully control and optimize PLD designs to meet their exacting design requirements. Availability ispDesignEXPERT, including Mentor Graphics design tools, are available for immediate shipment starting at $995 list price. Contact a Lattice Semiconductor Corporation sales representative for further information. About Mentor Graphics Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 2,975 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Ore. 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, Calif. 95131-2314. World Wide Web site: www.mentor.com. About Lattice Semiconductor Oregon-based Lattice Semiconductor Corporation, a world leader in programmable devices, designs, develops and markets the broadest range of high-performance ISP programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmable CPLDs to the logic industry in 1992. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Ore. 97124 USA; Telephone 503/268-8000, FAX 503/268-8037. For more information on Lattice Semiconductor Corporation, access our World Wide Web site at http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor Safe Harbor 1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated. 2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive. provisions of the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties, including technological and product development risks, changes to industry standards, and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. Lattice Semiconductor, L (stylized styl·ize tr.v. styl·ized, styl·iz·ing, styl·iz·es 1. To restrict or make conform to a particular style. 2. To represent conventionally; conventionalize. ) Lattice, ISP, In System Programmable, ispMACH, ispLSI, ispGAL, GAL, ispGDX, ispGDXV2, ispLEVER, ispEXPLORE Tool, ispUPDATE Performance Analyst and SpeedSEARCH are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United States and/or other countries. Mentor Graphics and ModelSim are registered trademarks and LeonardoSpectrum is a trademark of Mentor Graphics. |
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