Lattice Semiconductor Introduces the PLD of Analog Chips; Truly Programmable Analog Products Bring Easy, Fast & Flexible Design to Analog Designers.

HILLSBORO, Ore.--(BUSINESS WIRE)--Nov. 8, 1999--

Lattice Semiconductor (NASDAQ: LSCC) today announced its entrance into the Programmable Analog market with its new family of Programmable Analog Circuit monolithic ICs, the ispPAC(TM) family. The first two devices in the family available today are the ispPAC10 and ispPAC20. Dubbed by Lattice as the "PLD of Analog Chips," the ispPAC family brings the easy, fast, and flexible design benefits associated with Programmable Logic to the world of Analog design for the first time.

The ispPAC products integrate up to 60 active and passive analog components with hundreds of values onto a single chip. An engineer uses PC-based point-and-click software to set the characteristics of the analog components needed and to hook them together. The chip is programmed when the resulting design is downloaded into the chip's E2 configuration memory, and can be instantly reprogrammed when the user makes design changes.

"The PLD sprang onto the scene 20 years ago and engineers creating digital logic seized on the PLD's great step forward in ease-of-design and time-to-market, growing a $2.3B market in the process," said Cyrus Tsui, Lattice's CEO. "Pioneering in PLDs was gratifying because it changed the world of digital design. I've wanted to bring the same benefits to analog designers for 10 years and am very pleased that our breakthrough engineering work allows us to do that today."

Systems interface with the real world, and that creates a need to handle analog signals representing temperature, voltage, current, pressure, etc. Engineers typically design the desired analog circuits on paper or at a computer, then build a prototype board to prove it out. But it is very laborious and time-consuming to make the prototype work due to the variability of the multiple analog components used, combined with the extreme sensitivity analog circuits generally have to layout. Analog components exhibit slightly different characteristics from manufacturing lot to lot and from supplier to supplier, so once completed, the prototype board may be further delayed as it is modified to achieve manufacturability.

The Initial ispPAC Products

The first member of the PAC(TM) family is the ispPAC10. It includes four filter-summation PACblocks connected by an Analog Routing Pool. These can be configured to do summation and integration, and have programmable gain up to +/-20x, delivering a large gain range of 0-160,000 in millions of steps. The PAC(TM) blocks also provide push-button, high precision, continuous time, second-, third-, and fourth-order low-pass filtering over a range of 10KHz-100kHz, with fine resolution selectable from thousands of useful combinations.

The ispPAC20 has two PAC blocks similar to the ispPAC10's, and adds an 8-bit D-to-A converter and two differential comparators.

The initial ispPAC devices both perform with high linearity (88dB THD @ 10kHz) over a large dynamic range (greater than 100dB), through fully differential inputs and outputs, all using a single +5V power supply at industrial temperatures. And since the ispPAC family incorporates Lattice-innovated ISP(TM) (In-System Programmability), ispPAC products can be programmed and reprogrammed right on the circuit board, even after being soldered in place. ISP makes design changes remarkably fast and easy.

The PAC-Designer software tool is an integrated analog design environment with an easy-to-use GUI. It quickly enables the user to obtain "what-you-see-is-what-you-get" design results. PAC-Designer software is available for Windows 95, Windows 98, and Windows NT.

Applications

The ispPAC family will be used in a diverse field of applications, just as are discrete and low-integration analog components. Some general usage themes will find ispPAC products near DSP functions preparing the analog signal for digitization, next to the 30 percent of microcontrollers estimated to be used in conjunction with analog signals, in front of the volume of 12-bit A-to-D converters consumed today, and next to Lattice/Vantis ispPLDs used in myriad applications, which include analog circuitry.

Applications are expected to include a host of industrial sensing, test, and measurement designs as well as communication and computation systems.

What You See Is What You Get 

Using the ispPAC Family's PAC-Designer(R) software at a PC, an engineer selects the right analog components, their characteristics, and their interconnections on-screen. A simulator shows the resulting signals immediately. Since the analog components, their characteristics, and their interconnect are all on-chip, the designer can now enjoy the incomparable "What You See Is What You Get" benefit of the ispPAC Family - the programmed chip delivers precisely the signal shown by the simulator. And each ispPAC device delivers the same high-precision results repeatably, so board manufacturability follows quickly and easily.

Powerful Macros

Continuous-time Biquad and Ladder Filters are very complex functions that have been burdensome and involved for analog designers. Now they are included as user-friendly macros in the PAC-Designer software's library. Although board-level designers have enjoyed filter-synthesis software for years, the frame-breaking difference we provide is that after completing the design on the computer screen, the user downloads the design into the ispPAC device and the job is instantly complete, with unprecedented precision. This ease-of-design has never before existed for analog circuitry. The Lattice programmable continuous-time technology that makes it possible is truly a major engineering advance.

Reduced Cost of Ownership

The integration of dozens of analog components in a single ispPAC product yields higher quality and reliability; lower purchasing, inventory, and assembly costs; and a board space savings.

Further, each board can be calibrated while in use at the system level, exploiting the built-in autocalibration capability. This robust approach eliminates the need for costly trimming steps and components in the manufacturing process.

Availability

The ispPAC10 and ispPAC20 products and the PAC-Designer software are all available now. Pricing for the ispPAC10 or the ispPAC20 is under $7 in thousands. The PAC-Designer software can be downloaded from www.latticesemi.com and is complimentary during an introductory period. PACsystem10 and PACsystem20 Evaluation Kits can be ordered on the website for $149. The Kits include software, samples, download cables, evaluation boards, technical documentation, and application notes. The PACsystems are also available through our extensive distribution channels at a suggested retail price of $149.

About Lattice Semiconductor and Vantis

Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISP programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmability to the logic industry in 1992. In June 1999, Lattice acquired Vantis, the corporation that invented the PAL(R) device and PLD switch matrix architecture, from AMD. With nearly double the R&D and sales resources, the resulting integrated company will focus on delivering logic products that satisfy the performance, density and ease-of-use requirements of its customers.

Lattice/Vantis products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone [phone], FAX [phone]. For more information on Lattice Semiconductor Corporation or Vantis, access our World Wide Web sites at http://www.latticesemi.com.

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties, including the effect of changing economic conditions, the effect of overall semiconductor market conditions, product demand and market acceptance risks, risks associated with dependencies on silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

Lattice Semiconductor, L (stylized) Lattice, ispLSI, ISP, in-system programmable, ispPAC, PACsystem, PAC-Designer, Vantis and PAL are either registered trademarks or trademarks of Lattice Semiconductor or Vantis Corporation in the United States and/or other countries. Other marks are the property of their respective holders.

General Notice: Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.