Lattice Semiconductor FPSC Device Enables Smarter Networking With Avaya P580 and P882 Multiservice Switches.Business Editors, Technology Writers HILLSBORO, Ore.--(BUSINESS WIRE)--Oct. 24, 2002 Lattice Semiconductor Corporation (Nasdaq:LSCC LSCC Lake-Sumter Community College (Florida) LSCC Lattice Semiconductor Corporation (stock symbol) LSCC Lawson State Community College (Alabama) ) and Avaya, Inc. (NYSE NYSE See: New York Stock Exchange :AV) today announced that Avaya(TM) has deployed Lattice's ORLI10G Field-Programmable System Chip (FPSC FPSC Florida Public Service Commission FPSC Financial Planners Standards Council (Canada) FPSC Field Programmable System Chip (Lucent Technologies) FPSC Fundación Promoción Social de la Cultura ) within its Avaya P580 and the Avaya P882 MultiService Switches. Avaya has integrated 10 Gigabit Ethernet (10GbE) modules into the flagship products of its Cajun(R) MultiService Switching family, designed to provide not just the muscle of additional bandwidth, but also the brains of smarter networking hardware and software. All 10GbE traffic that flows through the Avaya switches will be carried by Lattice's ORLI10G FPSC, a 10 Gigabit line interface device that acts as a high-speed conduit for Ethernet traffic transmitted over optical components. Lattice's ORLI10G is the first programmable 10 Gigabit Ethernet line interface chip that provides data networking equipment designers with customizable, protocol-independent interfaces to high-speed optical transport facilities used in local area network (LAN (Local Area Network) A communications network that serves users within a confined geographical area. The "clients" are the user's workstations typically running Windows, although Mac and Linux clients are also used. ), wide area network (WAN), and metro area network (MAN) deployments. It implements a 10 Gigabit/s Sixteen-Bit Interface (XSBI XSBI 10 Gigabit Sixteen-Bit Interface (IEEE 802.3) XSBI Ten Gbps Sixteen Bit Interface ) for optical transponders by combining optimized, embedded core logic together with up to 643K gates of programmable logic. The programmable logic employs Lattice's ORCA(R) Series 4 field-programmable gate array (hardware) field-programmable gate array - (FPGA) A gate array where the logic network can be programmed into the device after its manufacture. An FPGA consists of an array of logic elements, either gates or lookup table RAMs, flip-flops and programmable interconnect wiring. architecture, which is specifically designed to accommodate networking Intellectual Property (IP) cores. The Lattice Advantage for 10 Gigabit Ethernet Solutions "The Lattice ORLI10G is an elegant solution for enabling 10 Gigabit Ethernet capabilities on our Cajun switch products," said Roozbeh Ghorishi, Director of Engineering for Avaya. "Lattice's FPSC technology provides us the flexibility of Ethernet PCS (1) (Personal Communications Services) Refers to wireless services that emerged after the U.S. government auctioned commercial licenses in 1994 and 1995. This radio spectrum in the 1. functionality implemented in programmable logic that seamlessly integrates with proven XSBI functionality in an embedded core. Lattice has a novel system-on-a-chip approach that delivers clear time-to-market and customization advantages while also addressing power, board space, interconnect, and design-complexity issues," Ghorishi added. "Lattice is pleased to provide Avaya with a solution for 10 Gigabit Ethernet in their industry-leading Avaya Cajun family of MultiService Switches," said Stan Kopec, vice president of marketing at Lattice Semiconductor. "The ORLI10G was designed to handle the demands of 10Gb Ethernet architectures, an essential technology for the rapidly expanding Metropolitan networking market. The ORLI10G's embedded XSBI core solves high-speed transponder interface issues, while our PCS IP core provides the critical Physical Coding Sublayer The Physical Coding Sublayer (PCS) further helps to define physical layer specifications for ethernet. The Ethernet PCS sublayer is part of the Ethernet PHY layer. The hierarchy is as follows: functions. With leaders like Avaya designing our FPSC technology into their systems, Lattice's position as a recognized leader in 10GbE solutions is quickly becoming established." The Avaya Advantage for Converged Networks "As communications networks become even more central to business, they will be called upon to do more: voice over IP, customer relationship management, video, unified messaging, supply chain management, process control, and distance learning. Meeting these demands will take more than just the muscle of additional bandwidth. It will require the brains of smarter networking hardware and software. That is where the Avaya MultiService Switches excel," said Graham Celine, vice president, solutions management, Avaya. At the top of Avaya's powerful line of Cajun(R) network switches, the Avaya P580 and Avaya P882 scale beyond the shared bus and shared memory designs of other lower capacity switches. The switches benefit from Avaya's standards-based VLAN See virtual LAN. VLAN - Virtual Local Area Network support, impressive N+1 redundancy options, Avaya's comprehensive understanding of Quality of Service issues for voice and video traffic, and labor-saving Avaya VisAbility(TM) Management Suite including Avaya(TM) MultiService Network Manager and Avaya(TM) Policy Manager Software. They are positioned to become core components of both current and future converged voice and data networks. Additional ORLI10G Technical Information Lattice's ORLI10G encompasses forward clocked, 16-bit transmit and receive 10 Gbit/s interfaces (as per OIF OIF Operation Iraqi Freedom OIF Organisation Internationale de la Francophonie (French: International Organization of Francophonie) OIF Office for Intellectual Freedom (American Library Association) 99.102.5). This 16-bit interface runs at the following rates: -- 622 Mbits/s: OC-192/STM-64 SONET/SDN interface (SFI-4) -- 645 Mbits/s: 10 Gigabit/s Sixteen-bit Interface (XSBI) -- 667 Mbits/s: Strong FEC interface (digital wrapper and OC-192/STM-64) -- 781 Mbits/s: Super FEC interface (digital wrapper and OC-192/STM-64) -- 850 Mbits/s: Super FEC interface (digital wrapper and OC-192/STM-64) The device interfaces directly to industry-standard multiplexer and demultiplexer ICs. This allows Lattice to offer cost-effective solutions for a variety of line interfaces: -- Optical Internetworking Forum The Optical Internetworking Forum (OIF) was organized to facilitate and accelerate the development of next-generation optical internetworking products. The OIF produces Electrical, Tunable Laser, Very Short Reach Hardware Interfaces. (OIF) SERDES See serializer/deserializer. -- Framer Interface (SFI-4) -- 10 Gigabit Ethernet 16-bit Interface (XSBI) -- 10 Gbit/s Strong Forward Error Correction A communications technique that can correct bad data on the receiving end. Before transmission, the data are processed through an algorithm that adds extra bits for error correction. If the transmitted message is received in error, the correction bits are used to repair it. (FEC See forward error correction. FEC - Forward Error Correction ) rates -- 12.5 Gbit/s Super FEC rates Lattice's 10 Gigabit Ethernet PCS (Physical Coding Sublayer) intellectual property core includes the following features: -- Elastic buffers implemented as 256x72 FIFOs in embedded RAM -- XGMII XGMII 10 Gbit Media Independent Interface XGMII Ten Gbps Media Independent Interface for interfacing to 10 Gbits/s Ethernet MACs -- 64/66b encoder/decoder -- Scrambler A device or software program that encrypts data for security purposes. See scramble. and deScrambler de·scram·bler n. An electronic device that decodes a scrambled transmission into a signal that is intelligible to the receiving apparatus. descrambler with word aligner (x59 + x39 +1) -- Quad 2.5 Gbits/s SONET/SDH to 10 Gbits/s SONET/SDH MUX/deMUX functions -- Idle insertion and deletion -- Serial Management Interface (SMI) compliant with Clause 45 of the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 802.3ae standard Lattice can deliver the PCS core as a ready-to-run bitstream or with VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. source code, along with simulation and synthesis scripts, and complete documentation. About Avaya Avaya Inc. designs, builds and manages communications networks for more than one million businesses around the world, including 90 percent of the FORTUNE 500(R). A world leader in secure and reliable Internet Protocol (IP) telephony systems, communications software applications and services, Avaya is driving the convergence of voice and data applications across IT networks, enabling businesses large and small to leverage existing and new networks to enhance value, improve productivity and gain competitive advantage. For more information visit the Avaya website: http://www.avaya.com. About Lattice Semiconductor Corporation Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISP(TM) programmable logic devices (PLDs), Field Programmable Gate Arrays (FPGAs) and Field Programmable System Chip (FPSC) devices. Lattice offers total solutions for today's system designs by delivering the most innovative programmable silicon products that embody leading-edge system expertise. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communication, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone 503-268-8000, FAX 503-268-8037. For more information on Lattice Semiconductor Corporation, access our World Wide Web site at http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. Lattice Semiconductor Corporation, L (& design), Lattice (& design), in-system programmable -- ISP, ORCA and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. Avaya and Cajun are registered trademarks Avaya, Inc. in the United States and other countries. GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders. |
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