Lattice Semiconductor Announces World's Fastest Programmable Logic Devices.Business Editors/High Tech Writers HILLSBORO, Ore.--(BUSINESS WIRE)--July 10, 2000 Next Generation BFW BFW Battle for Wesnoth (computer strategy game) BFW Bundesverband Freier Immobilien- und Wohnungsunternehmen BFW Bicycle Federation of Wisconsin BFW Bread for the World BFW Birthing From Within (Goleta, CA) Products - SuperFAST(tm) ispLSI(R) 2000VE Family Redefines System Performance with 3ns Pin-to-Pin Logic Delays, 300 MHz Operating Frequencies Lattice Semiconductor Corporation (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :LSCC LSCC Lake-Sumter Community College (Florida) LSCC Lattice Semiconductor Corporation (stock symbol) LSCC Lawson State Community College (Alabama) ) today announced the release of its second generation BFW (Big, Fast, Wide) ISP (1) See in-system programmable. (2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines. (tm) PLD products with the production and availability of the high-performance SuperFAST ispLSI 2000VE family. This enhanced family of 3.3V ISP CPLDs redefines system performance with 3ns pin-to-pin (Tpd) logic delays and 300 MHz operating frequencies. The new family includes five devices ranging in capacity from 32 to 192 logic macrocells. The first member, the 128-macrocell ispLSI 2128VE is now shipping at 4ns, 250 MHz performance, the industry's fastest 128-macrocell CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. . "The SuperFAST 2000VE product family confirms Lattice's position as the industry's leading supplier of high performance PLD solutions. Combined with Lattice's SuperWIDE(tm) ispLSI 5000V, SuperBIG(tm) ispLSI 8000V, and SpeedLocked(tm) ispMACH(tm) 4A families we continue to deliver the industry's biggest, fastest and widest PLDs," said Steve Stark, Lattice Semiconductor's Director of Component Marketing. "By offering system designers the highest performance with low voltage operation, Lattice will further expand and consolidate its leadership in the 3.3V programmable logic market." Enhanced Product Family The 32-macrocell ispLSI 2032VE now features 3ns (Tpd) with 300MHz maximum operating frequency (Fmax). The ispLSI 2064VE features 3.5ns and 280MHz performance. Both the 96-macrocell ispLSI 2096VE and 128-macrocell ispLSI 2128VE support new speed grades at 4.0ns and 250MHz. The 192-macrocell ispLSI 2192VE boasts a new speed grade of 4.5ns and 225MHz. The ispLSI 2000VE family is fully IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1149.1 (JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group ) Boundary Scan testable and in-system programmable. The family also includes a broad list of features including programmable pull-up resistors, hot socketing capability, programmable open-drain outputs and the industry's fastest programming times. Software Support A broad library of design tools including Lattice's ispDesignEXPERT(tm) systems supports the enhanced ispLSI 2000VE family of devices. These systems support PC and workstation platforms, providing logic design implementation in all leading electronic design environments. The third-generation logic compiler in Lattice's ispDesignEXPERT systems is specifically designed to optimize VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog-based logic designs synthesized by third-party HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. synthesis tools. All the advanced architectures of Lattice's recently announced ISP device families are supported. Pricing and Availability The first member of the ispLSI 2000VE family is the 128-macrocell, 128 I/O, ispLSI 2128VE. It is available in speeds from 4ns to 10ns and is now shipping in the 176-pin TQFP See QFP. , 160-pin PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. and the advanced, 208-ball fine-pitch BGA packages. Pricing for the ispLSI 2128VE in volume is under $5.00. The majority of the remaining ispLSI 2000VE family members are planned for release in 3Q 2000, with the entire family released by the end of 2000. About Lattice Semiconductor Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISP(tm) programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmability to the logic industry in 1992. In June 1999, Lattice acquired Vantis, the corporation that invented the PAL(R) device and PLD switch matrix architecture, from AMD (Advanced Micro Devices, Inc., Sunnyvale, CA, www.amd.com) A major manufacturer of semiconductor devices including x86-compatible CPUs, embedded processors, flash memories, programmable logic devices and networking chips. . With nearly double the R&D and sales resources, Lattice is focused on delivering logic products that satisfy the performance, density and ease-of-use requirements of its customers. Lattice and Vantis products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone 503-268-8000, FAX 503-268-8037. For more information on Lattice Semiconductor Corporation, access our World Wide Web sites at http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties, including the effect of changing economic conditions, the effect of overall semiconductor market conditions, product demand risks, risks associated with dependencies on silicon wafer suppliers and semiconductor assemblers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. Lattice Semiconductor, L (stylized styl·ize tr.v. styl·ized, styl·iz·ing, styl·iz·es 1. To restrict or make conform to a particular style. 2. To represent conventionally; conventionalize. ) Lattice, Vantis, PAL, ISP, ispLSI, in-system programmable, in-system programmability, ispDesignEXPERT, SpeedLocked, UltraMOS, ispMACH 4A, SuperFAST, SuperBIG, and SuperWIDE, are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders. |
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