Lattice Delivers First Integrated ispDesignEXPERT Software Supporting All Lattice/Vantis Logic Devices.Business Editors/High Tech Writers HILLSBORO, Ore.--(BUSINESS WIRE)--Jan. 31, 2000 --Single Package Bundles Leading CAE (1) (Computer-Aided Engineering) Software that analyzes designs which have been created in the computer or that have been created elsewhere and entered into the computer. Vendor HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. Synthesis and RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; Simulation Software With Integrated Device Compilers for In-System Programmable (ISP (1) See in-system programmable. (2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines. (TM)) Device Design-- Lattice Semiconductor (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on : LSCC LSCC Lake-Sumter Community College (Florida) LSCC Lattice Semiconductor Corporation (stock symbol) LSCC Lawson State Community College (Alabama) ) today announced delivery of its ispDesignEXPERT Development Systems supporting Lattice's full line of ISP CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD. , ispGDX(R), and SPLD (Simple PLD) A programmable logic device that provides a small logic block that can be programmed. The logic block typically contains a handful of macrocells, which have multiple inputs and the ability to perform a limited amount of logic. devices. The integrated ispDesignEXPERT tools include leading CAE vendor HDL synthesis and simulation tools, coupled with powerful compilers for ispLSI(R), MACH(R), GAL(R), and PAL(R) device design. Integrated Package Supports All Lattice/Vantis Devices Because previous versions of the ispEXPERT(TM) system for ispLSI/GAL design and DesignDirect(TM) tools for MACH/PAL design were based on a similar graphical user interface graphical user interface (GUI) Computer display format that allows the user to select commands, call up files, start programs, and do other routine tasks by using a mouse to point to pictorial symbols (icons) or lists of menu choices on the screen as opposed to having to , engineers at Lattice/Vantis were able to produce a tightly integrated ispDesignEXPERT product, providing an easy and seamless transition for customers. Users may choose any Lattice/Vantis device and any CAE vendor tool for design and implementation. Device context sensitive tool menus ease the design process and speed user's products to market. &uot;Our software goal during the past six months has been to develop and deliver a world class tool set supporting the entire Lattice/Vantis silicon product line. No other programmable logic design tools offer the same level of design function, performance, and value in an integrated product,&uot; said Stan Kopec, Vice President of Corporate Marketing at Lattice. &uot;The ispDesignEXPERT has fully integrated compilers for both MACH and ispLSI device design along with the CAE industry's best synthesis and RTL simulation tools, providing the functionality and performance our customers demand.&uot; Configurations to Meet Every Design Need Lattice has integrated VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog synthesis tools from Exemplar Logic, Synopsys, and Synplicity, as well as design and verification tools from Model Technology and Viewlogic into an array of ispDesignEXPERT products supporting any user design flow. The ispDesignEXPERT-HDL includes Exemplar and Synplicity HDL synthesis and RTL and timing simulation from Model Technology in a single package. Lattice's Viewlogic and Synopsys package, called ispDesignEXPERT-Viewlogic, also includes synthesis, RTL and timing simulation, as well as other familiar design entry and verification tools from Viewlogic. Every configuration of the ispDesignEXPERT system includes an efficient Windows-based Project Navigator, ABEL Abel, son of Adam and Eve, in the Bible Abel, in the Bible, son of Adam and Eve, a shepherd, killed by his older brother, Cain; in the Gospel of St. Matthew, mentioned as the first martyr. language and schematic entry, and Lattice's powerful Design Assistants, such as Performance Analyst(TM), and the ispANALYZER(TM), to increase productivity and speed the logic design task. Only Lattice delivers the total ISP solution. Every ispDesignEXPERT product also includes Lattice's new ispVM System(TM), the best in-system programming software suite available today. Pricing and Availability The first products available today, including the ispDesignEXPERT-HDL Base (supporting devices up to 600 macrocells) and Advanced systems (supporting the industry's largest CPLD devices, Lattice's ispLSI 8000V family) are priced at $995 and $3,995, respectively. All customers currently on maintenance will receive a free update to ispDesignEXPERT. Downloadable starter software (supporting devices up to 600 macrocells), is available on Lattice's website at: www.latticesemi.com. Other product configurations will be available in March 2000. Lattice delivers ispDesignEXPERT products for both fixed and floating node design environments supporting Windows-based design. About Lattice Semiconductor Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISP programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmability to the logic industry in 1992. In June 1999, Lattice acquired Vantis, the corporation that invented the PAL(R) device and PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user. switch matrix architecture, from AMD (Advanced Micro Devices, Inc., Sunnyvale, CA, www.amd.com) A major manufacturer of semiconductor devices including x86-compatible CPUs, embedded processors, flash memories, programmable logic devices and networking chips. . With nearly double the R& and sales resources, the resulting integrated company focuses on delivering logic products that satisfy the performance, density and ease-of-use requirements of its customers. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone 503-268-8000, FAX 503-268-8037. For more information on Lattice Semiconductor Corporation access our World Wide Web site at http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties, including the effect of changing economic conditions, the effect of overall semiconductor market conditions, product demand and market acceptance risks, risks associated with dependencies on silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. Lattice Semiconductor, L (stylized styl·ize tr.v. styl·ized, styl·iz·ing, styl·iz·es 1. To restrict or make conform to a particular style. 2. To represent conventionally; conventionalize. ) Lattice, Vantis, MACH, PAL, ispLSI, ISP, in-system programmable, ispGDX, GAL, ispVM, ispDesignEXPERT, ispEXPERT, ispANALYZER, and Performance Analyst are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United States and/or other countries. Other marks are the property of their respective holders. GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. |
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