Karen Pieper and Johny Srouji Receive Accellera Technical Excellence Award for Contributions to SystemVerilog Standard.NAPA, Calif. -- SystemVerilog Supports Architectural & Behavioral Electronic Design & System Verification with Assertions and Testbench Accellera, the electronics industry organization focused on electronic design automation standards, has named Synopsys Inc.'s Karen Pieper and IBM's Johny Srouji the recipients of the organization's 2nd annual Technical Excellence Award for their contributions to the SystemVerilog hardware description and verification language (HDVL HDVL Hab Dich Voll Lieb (German) ) standard (also known as IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. P1800). The award is being presented at Accellera's open Member meeting at the Design Automation Conference (DAC See D/A converter and discretionary access control. DAC - Digital to Analog Converter ), Wednesday, June 15, 2005 at 10:00am, Anaheim Hilton, Capistrano B. (To attend this meeting, please register at http://www.accellera.org/events/register/.) "Karen Pieper and Johny Srouji have been key and instrumental players in the development and delivery of SystemVerilog as a hardware description and verification language standard through both the Accellera and IEEE processes," noted Dennis Brophy, Accellera chairman. "Their technical leadership in the standardization effort as the Chairs, respectively, of the technical team and the IEEE working group added tremendous value to our SystemVerilog standard." About Accellera's Technical Excellence Award Accellera's Technical Excellence Award recognizes major contributions to the development of Accellera's standards by the organization's technical committee members. Examples of the contributions may include leadership in standardization of new technologies, assuring achievement of standards development goals or identifying opportunities to better serve the needs of the industry through standards. More Award information is located at www.accellera.org/award.html. About SystemVerilog & IEEE P1800 The emerging IEEE P1800 standard for SystemVerilog extends the Verilog HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. to provide a unified hardware design, specification and verification language. SystemVerilog includes design specification methods, an embedded assertions language, a testbench language including coverage and assertions, an Application Programming Interface (API), and a Direct Programming Interface (DPI (Dots Per Inch) The measurement of the resolution of display and printing systems. A typical CRT screen provides 96 dpi, which provides 9,216 dots per square inch (96x96). Flat panel displays from 110 to 200 dpi have also been developed. ). About Accellera's Technical Excellence Award Recipients Karen Pieper, Chair of the IEEE P1800 SystemVerilog Technical Sub-Working Group Karen Pieper is a R&D Director for Design Compiler at Synopsys. Karen has a Bachelors degree in Computer Science from Rice University, and a PhD. in Computer Science from Stanford University Stanford University, at Stanford, Calif.; coeducational; chartered 1885, opened 1891 as Leland Stanford Junior Univ. (still the legal name). The original campus was designed by Frederick Law Olmsted. David Starr Jordan was its first president. . Johny Srouji, Chair of IEEE P1800 SystemVerilog Working Group Johny Srouji works at IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) Austin in the Systems & Technology Group and holds a technical lead position as Power czar in the servers' microprocessor group. He received his Bachelor and Masters degree in Computer Science from the Technion, Israel Institute of Technology. About SystemVerilog at the Design Automation Conference, June 13-16 Accellera is sponsoring the SystemVerilog Booth #2284 at the Design Automation Conference next week in Anaheim, California “Anaheim” redirects here. For Annaheim, see Annaheim, Saskatchewan. Anaheim is a city in Orange County, California, located 28 miles southeast of Los Angeles. (www.dac.com). About Accellera Accellera provides design standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization for·mal·ize tr.v. for·mal·ized, for·mal·iz·ing, for·mal·iz·es 1. To give a definite form or shape to. 2. a. To make formal. b. and ongoing change control. For more information about Accellera, please visit www.accellera.org. Notes to editors: Photos are available on request. All trademarks and tradenames are the property of their respective holders. |
|
||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion