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John Havlicek Receives Accellera Technical Excellence Award for Contributions to Design Automation Standards for Verification.


Business Editors/High-Tech Writers

Design Automation Conference 2004

NAPA, Calif.--(BUSINESS WIRE)--June 9, 2004

Accellera, the electronics industry organization focused on electronic design automation standards has named John Havlicek the 1st recipient of its annual Technical Excellence Award. The award is being presented today at the organization's open Member meeting at the Design Automation Conference (DAC See D/A converter and discretionary access control.

DAC - Digital to Analog Converter
), Wednesday, 10:00am, room 26A, San Diego Convention Center The San Diego Convention Center is the main convention center for the city of San Diego, California. It is located in the Marina district of downtown San Diego near the Gaslamp Quarter, at 111 West Harbor Drive. .

Dr. Havlicek, Principal Staff Scientist, Freescale Semiconductor, Inc., a subsidiary of Motorola, Inc. (NYSE NYSE

See: New York Stock Exchange
:MOT), receives the 2004 Accellera Technical Excellence Award, based on his outstanding technical contributions to Accellera's Formal Verification Technical Committee (FVTC FVTC Fox Valley Technical College (Wisconsin) ) and related sub-committees, and for his work on the formal semantics of SystemVerilog Assertions (SVA SVA School of Visual Arts
SVA Severe (Thunderstorm) Advisory
SVA Statens Veterinärmedicinska Anstalt (National Veterinary Institute, Sweden)
SVA Shareholder Value Added
) and Accellera's Property Specification Language (PSL 1. PSL - Portable Standard Lisp.
2. PSL - Problem Statement Language. See PSL/PSA.
) as well as their alignment.

"We are very pleased to have one of the outstanding members of our technical committees recognized for achievements that move verification standards forward to benefit the EDA, electronic systems and semiconductor industries," said Dennis Brophy, Accellera chairman. "John's grasp of the fine points of our sophisticated assertion languages and work on their formal semantics has helped us achieve better alignment between SVA and PSL."

About Accellera's Technical Excellence Award & Accellera's Technical Subcommittees

Accellera's Technical Excellence Award recognizes major contributions to the development of Accellera's standards by the organization's technical committee members. Examples of the contributions may include leadership in standardization of new technologies, assuring achievement of standards development goals or identifying opportunities to better serve the needs of the industry through standards. More Award information is located at www.accellera.org/award.html.

Accellera's Technical Subcommittees include Formal Verification, Harmony, Interface, OpenKit (OK), Open Verification Library Open Verification Library (OVL) is a library of property checkers for digital circuit descriptions written in popular Hardware Description Languages (HDLs). OVL is currently maintained by Accellera.  (OVL), Rosetta, SystemVerilog and Verilog AMS AMS - Andrew Message System . For information about Accellera's Technical Subcommittees, please visit, http://www.accellera.org/subcom.html.

About Accellera

Accellera provides design standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. , Accellera standards are provided to the IEEE standards body for formalization and ongoing change control. For more information about Accellera, please visit www.accellera.org. Accellera is located at 1370 Trancas Street #163, Napa, CA 94558. Phone: (707) 251-9977, Fax: (707) 251-9877, info@accellera.org.

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Date:Jun 9, 2004
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