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JasperGold Adds Proof Accelerators for Fast, Thorough Verification.

Speeds End-to-End Proofs for Data Packet Integrity, RAM, and Multipliers

MOUNTAIN VIEW, Calif. -- Jasper Design Automation, provider of advanced formal technology solutions, today announced the addition of three new Proof Accelerators to its JasperGold[R] Verification System. Proof Accelerators increase the power, the capacity and the performance of formal verification by significantly reducing the state-space of a design through optimized modeling of common design functions.

Proof Accelerators & JasperGold

JasperGold provides rapid bug detection and debug as well as end-to-end full proofs of expected design behavior, and provides valuable insight across the design cycle in architectural analysis, RTL debug, verification and post silicon debug. Jasper's Proof Accelerators speed up formal proofs to significantly reduce verification complexity, and combined with Design Tunneling[TM] can consistently perform full proofs on properties where other formal tools fail to converge, with an average 10x proof capacity advantage over competitors.


A selection of Proof Accelerators for JasperGold are currently available to handle myriad applications, including data transfer integrity, FIFO and memory modeling, data synchronization across clock domains, cache verification, and more. For complete details contact Jasper at:

About Jasper Design Automation

Jasper delivers industry-leading EDA solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 100 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, India and Japan. Visit for Targeted ROI: reducing risks; increasing design, verification and reuse productivity; and accelerating time to market.

Jasper Design Automation, the Jasper Design Automation logo, ActiveDesign, Behavioral Indexing, and JasperGold are trademarks or registered trademarks of Jasper Design Automation, Inc. All other trademarks mentioned are the property of their respective companies.
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Publication:Business Wire
Date:Apr 20, 2009
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