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Jasper Design Automation Introduces Multi-Proof JasperCore for Powerful, Scalable Formal Verification Deployment.

Productivity Soars With New ProofGrid Technology

MOUNTAIN VIEW, Calif. -- Jasper Design Automation, provider of advanced formal technology solutions, announces its latest product, JasperCore[TM]. JasperCore harnesses the proven capabilities of the company's formal analysis engines to boost productivity and decrease the cost of deployment by performing numerous parallel runs using ProofGrid[TM], a new capability that distributes formal technology. Together, JasperCore and ProofGrid allow users to implement multiple proofs, tasks, and applications, across multiple cores and computers, efficiently serving multiple users, even across multiple business units.

ProofGrid, presently included in both JasperCore and JasperGold[R] (the company's flagship formal verification
"Verifiability" redirects here. For the Wikipedia policy, see Wikipedia:Verifiability.


In the context of hardware and software systems, formal verification
 tool), enables this through the dynamic allocation of properties, proof engines and licenses over a computer network for parallelism An overlapping of processing, input/output (I/O) or both.

1. parallelism - parallel processing.
2. (parallel) parallelism - The maximum number of independent subtasks in a given task at a given point in its execution. E.g.
 and efficiency. ProofGrid significantly raises formal verification throughput and performance by leveraging the emerging power of local machine, cluster, and computer farms. It also provides seamless and powerful distribution and collaboration management for proof engines running on the network under a unified tracking console. The result is soaring productivity as users are freed from manually separating and dispatching multiple, single runs and then collecting the results for each.

As part of this major new product release, both JasperGold and JasperCore have been re-architected to include even more proof power, with more verification performance and capacity, and reduced memory and processing requirements. Significant enhancements include faster proof and visualization Using the computer to convert data into picture form. The most basic visualization is that of turning transaction data and summary information into charts and graphs. Visualization is used in computer-aided design (CAD) to render screen images into 3D models that can be viewed from all  flows, proof engine enhancements, and high-performance design-traversal or "smart" algorithms to speed debugging (programming) debugging - The process of attempting to determine the cause of the symptoms of malfunctions in a program or other system. These symptoms may be detected during testing or use by real users. . Powerful abstractions such as new Proof Accelerators and Scoreboard increase the power, capacity and performance of the tools. Proof Accelerators are formal modeling methods that significantly reduce the state-space of a design through optimized modeling (abstraction) of common design functions.

In addition, JasperGold now incorporates QuietTrace[TM], a new feature shared by Jasper's design and reuse reuse - Using code developed for one application program in another application. Traditionally achieved using program libraries. Object-oriented programming offers reusability of code via its techniques of inheritance and genericity.  solution, ActiveDesign[TM]. QuietTrace is a visualization and debugging capability for RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  development that reduces iterations by allowing the user to focus only on the most relevant issues impacting the design.

QuietTrace works with Jasper's Visualize[TM], which automatically generates and manipulates waveforms without a testbench, answering "what-if" design questions and providing visual confirmation of design functionality which is especially useful for RTL development and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. . Visualize in JasperGold lets designers use formal technology more easily and efficiently, without assertions. In ActiveDesign, Visualize pairs with Behavioral Indexing[TM] (for the extraction, indexing and storage of design behaviors in a database) to create an executable specification of the design to promote design understanding, knowledge transfer, and leverage.

Another important addition to ActiveDesign is Implication Analysis[TM], technology to extract and compare structural information on multiple revisions of the RTL, and behavioral analysis technology to extract and compare waveforms generated from recipes on multiple revisions of the RTL. Used in combination with Visualize, this analysis highlights the effect of design changes by displaying precise differences in behaviors.

Price/Availability

JasperCore is now available, as are the newest, updated versions of JasperGold and ActiveDesign. For more information and pricing, contact Jasper at: info @ jasper-da.com.

Jasper At DAC See D/A converter and discretionary access control.

DAC - Digital to Analog Converter
 2009

JasperCore, JasperGold and ActiveDesign will all be featured at Jasper's DAC Booth 3767. For more information, or to register for a product demo during the show, visit: http://www.jasper-da.com/dac/dacreg.htm.

About Jasper Design Automation

Jasper delivers industry-leading EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 100 successful chip deployments. Jasper, headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see .
Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains.
, is privately held, with offices and distributors in North America North America, third largest continent (1990 est. pop. 365,000,000), c.9,400,000 sq mi (24,346,000 sq km), the northern of the two continents of the Western Hemisphere. , South America South America, fourth largest continent (1991 est. pop. 299,150,000), c.6,880,000 sq mi (17,819,000 sq km), the southern of the two continents of the Western Hemisphere. , Europe, and Japan. Visit www.jasper-da.com for Targeted ROI (Return On Investment) The monetary benefits derived from having spent money on developing or revising a system. In the IT world, there are more ways to compute ROI than Carter has liver pills (and for those of you who never heard of that expression, it means a lot). : reducing risks; increasing design, verification and reuse productivity; and accelerating time to market.

Jasper Design Automation, the Jasper Design Automation logo, ActiveDesign, Behavioral Indexing, Implication Analysis, JasperCore, JasperGold, ProofGrid, QuietTrace, and Visualize are trademarks or registered trademarks of Jasper Design Automation, Inc. All other trademarks mentioned are the property of their respective companies.
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Copyright 2009 Gale, Cengage Learning. All rights reserved.

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Publication:Business Wire
Date:Jul 13, 2009
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