Japan's STARC Selects Extreme DA GoldTime as the Reference Timing Tool for STARC's Variation-aware IC Analysis Flow.Integrated Circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. Designed at Process Nodes of 65-nanometers and Below Demand a New-Generation Statistical Approach for Faster, Higher-quality Production SANTA CLARA Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , Calif. -- Extreme DA[TM] announced the selection by Japan's leading semiconductor research organization, the Semiconductor Technology Academic Research Center (STARC STARC Semiconductor Technology Academic Research Center (Japan) STARC State Area Command STARC Student Alliance to Reform Corporations STARC Somerset Tackling Alcohol Related Crime STARC St. Albans Amateur Radio Club (St. ), of the Extreme DA GoldTime[TM] timing analyzer. GoldTime is now the reference tool for STARC's statistical static timing analysis Conventional static timing analysis (STA) has been a stock analysis algorithm for the design of digital circuits over the last 30 years. However, in recent years the increased variation in semiconductor devices and interconnect has introduced a number of issues that cannot be handled by (SSTA SSTA Saskatchewan School Trustees' Association SSTA Scottish Secondary Teachers' Association (Scotland) SSTA Sea Surface Temperature Anomaly SSTA Statistical Static Timing Analysis SSTA Security Seal Testing Authority ) flow, v1.5. STARC is targeting this month for release of the new flow to its member companies. Statistical Analysis Software Required for IC Designs at 65-nm or Below At advanced process nodes of 65-nanometers (nm) and below, statistical analysis software is required for analyzing systematic and random variations that affect the performance of IC designs. Variation-aware analysis helps designers understand the effects that variations have on achieving timing targets for their IC designs. STARC has established the precision of the GoldTime timing analyzer and completed a study that validated a variation-aware SSTA flow using a wide range of 65-nm designs. STARC engineers analyzed test chips and confirmed the benefits of the SSTA design flow compared with traditional worst-case corner methods. STARC expects its member companies to see design performance improvements of approximately 10 percent through reduction in unnecessary pessimism pessimism, philosophical opinion or doctrine that evil predominates over good; the opposite of optimism. Systematic forms of pessimism may be found in philosophy and religion. . The companies can also expect to reduce turn-around-time, IC die area, and power loss through leakage LEAKAGE. The waste which has taken place in liquids, by their escaping out of the casks or vessels in which they were kept. By the act of March 2, 1799, s. 59, 1 Story's L. U. S, 625, it is provided that there be an allowance of two per cent for leakage, on the quantity which shall appear . The STARC SSTA v1.5 flow features the GoldTime SSTA to optimize performance in conjunction with common IC design tool sets. Extreme DA is the technology leader in advanced timing analysis software that improves parametric yield and addresses the many process variations in the latest generation of semiconductors. "Our member companies are increasing their requests for an advanced, variation-aware analysis solution for timing sign-off," said Nobuyuki Nishiguchi, vice-president and general manager of Development Department-1 at STARC. "Our variation-aware flow using SSTA technology from Extreme DA will not only enhance accuracy and quality of timing analysis, but will also enhance efficiency of timing closure, with aggressive pessimism reduction and feedback results to place-and-route tools. The design sign-off and optimization provided by the SSTA flow will reduce turn-around-time, IC die area, and power leakage. In addition, it will enable increased clock speed for better performance." "The selection by STARC of Extreme DA GoldTime as the reference tool for its variation-aware SSTA flow is a strong endorsement of the technological leadership of our timing solution," said Mustafa Celik, president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Extreme DA. "The speed, accuracy, precision, and capacity of our new-generation analysis tools have now been verified, and can be used by STARC member companies across Japan. We look forward to extending our collaboration with STARC to validate new kinds of analysis that will be crucial for makers of advanced IC designs." About STARC The Semiconductor Technology Academic Research Center (STARC) of Yokohama, Japan is a research consortium co-founded on December 28, 1995 by major Japanese semiconductor companies. STARC's mission is to contribute to the growth of the Japanese semiconductor industry by developing leading edge System-on-Chip (SoC) design technologies. STARC shareholders are Fujitsu Limited, Matsushita Electric Industrial Co., Ltd., NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98). NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. Electronics Corporation, Oki Electric Industry Co., Ltd., Renesas Technology Renesas Technology Corporation (ルネサス テクノロジ| Corporation, Rohm Co., Ltd., Sanyo Semiconductor Co., Ltd., Seiko Epson Seiko Epson Corporation (セイコーエプソン株式会社 Corporation, Sharp Corporation, Sony Corporation, and Toshiba Corporation (company) Toshiba Corporation - A Japanese technology manufacturer with 364 subsidiaries worldwide. Toshiba makes and sells electronics for home, office, industry and health care including information and communication systems, electronic components, heavy electrical apparatus, . For more information about STARC, please visit www.starc.jp. About Extreme DA Headquartered in Santa Clara, Calif., venture-funded Extreme DA develops and licenses software products for the timing sign-off of 65- and 45-nanometer integrated circuits. The company's investors include Foundation Capital, IT-Farm Corporation, and Lanza techVentures. For the latest news and information on Extreme DA, visit www.extreme-da.com or write to info@extreme-da.com. Extreme DA and Extreme GoldTime are trademarks of Extreme DA. All other legal marks are the property of their respective owners. |
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