Printer Friendly
The Free Library
14,709,930 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

JEDA Technologies to Integrate SystemC Verification Automation Tools with CoWare.


Bringing Native SystemC Assertion-Based Verification Technology to Users of CoWare Platform Architect and Model Designer

YOKOHAMA, Japan -- JEDA JEDA Jobs-Economic Development Authority (Myrtle Beach, SC, USA)
JEDA Joint Environmental Data Analysis
JEDA Joint Electronic Document Access
JEDA Joint Engine for Defense Analysis
 Technologies, announced today that they are cooperating with CoWare, the leading supplier of platform-driven electronic system-level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) design software and services, to integrate JEDA's NSCa (Native SystemC assertion) into the CoWare environment. This integration will bring JEDA's native SystemC assertion-based verification technology to CoWare users. JEDA also joins CoWare's CoTeam partnership program.

"CoWare's leadership position and adherence to standards make CoWare an ideal partner for JEDA. Their ESL design solutions for the capture, simulation, and analysis of virtual hardware platforms in SystemC are very complementary to JEDA's run-time verification solution for SystemC that enforces the correctness of the design. This is a customer-driven integration by major CoWare users," says Stephen R. Pollock, VP of Marketing and Sales at JEDA.

"Assertion-based verification has been proven at the RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  level," said Patrick Sheridan, Director of Marketing for platform design solutions at CoWare. "SystemC assertions and transaction-level protocol checking technology bring new design capabilities to system architects and platform developers that will make these approaches even more useful, enabling system and architecture verification to start much earlier. We are very pleased to welcome JEDA as a CoTeam integration partner."

Capturing design constrains with embedded assertions enable Platform Architect and Model Designer users to pinpoint violations in design models or isolate hardware problems from software under simulation. The integrated solution allows users to create, run, analyze and debug assertions. Contact your local CoWare or JEDA sales person for more information or if you are interested in being a beta partner.

About NSCa

NSCa, which was first released in February 2006, is a complete native SystemC assertion development and debug solution. It supports both cycle-level and transaction-level assertions. NSCa enables the architect/system engineer to capture system-level design constrains and easily create functional and or performance analysis checkers natively inside their SystemC environments. Since NSCa checkers run dynamically, they pinpoint the source of errors during runtime. This method is much more efficient than trying to post process and analyze simulation dump files. NSCa checks can also be used to aid the software developer to quickly identify or rule out hardware model issues in a virtual prototyping environment.

NSCa includes additional functionality to measure the quality of the assertion checks. This mechanism, called assertion path coverage, provides detailed information to determine how thoroughly the assertion code was exercised.

About Platform Architect and Model Designer

CoWare Platform Architect is the SystemC-based graphical environment for capturing the entire product platform and the dash board for initiating the platform analysis functions. Platform Architect speeds the concurrent design of SoCs with embedded software, enabling users to rapidly create and validate SoC designs at the transaction level. CoWare Model Designer is the SystemC-based modeling and simulation environment for capturing complex IP blocks and verifying them. Model Designer speeds development and debug of transaction-level models, providing native support SystemC and TLM TLM Telemetry
TLM Transaction Level Modeling
TLM Tout Le Monde (French)
TLM The Leprosy Mission (Northern Ireland)
TLM Transmission Line Matrix
TLM The Little Mermaid (fairy tale) 
 industry standards. Together with the CoWare Model Library, CoWare Platform Architect and Model Designer enable most comprehensive system-level design solution available.

About CoWare

CoWare is the leading supplier of platform-driven electronic system-level (ESL) design software and services. CoWare offers a comprehensive set of ESL tools that enable electronics companies to "differentiate by design" through the creation of system IP including embedded processors, on-chip buses, and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  algorithms; the architecture of optimized SoC platforms; hardware/software co-design; and virtual platforms for device software development. The company's solutions are based on open industry standards including SystemC. CoWare's customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare's corporate investors include ARM [(LSE LSE - Language Sensitive Editor :ARM); (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:ARMHY)], Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services.

http://cadence.com/.

See also Verilog.
 (NASDAQ:CDNS CDNS Cadence Design Systems, Inc (stock symbol)
CDNS Climatological Data National Summary
CDNS Command Data Network System
CDNS Customer and Data Network Services (Sprint) 
), STMicroelectronics (NYSE NYSE

See: New York Stock Exchange
:STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), and Sony Corporation (NYSE:SNE SNe Supernovae (astronomy)
SNE Sony Corporation (stock symbol)
SNE Syndicat National de l'edition (French Publisher's Association)
SNE Society for Nutrition Education
). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services visit http://www.coware.com.

About JEDA Technologies

JEDA Technologies, founded in 2002, is the "System-Driven Verification Automation Company" focused on providing verification automation tools for SystemC based designs. The founding team invented Vera when they were at Sun Microsystems. The company is based in Los Altos, California Los Altos (IPA: [lɔs ɑltos]) is a city at the southern end of the San Francisco Peninsula, in the San Francisco Bay Area. The city is in Santa Clara County, California, United States.  with a development center in Beijing China. For more information, please visit www.jedatechnologies.com.

NSCa, JEDA and JEDA Technologies are trademarks of JEDA Technologies, Inc. CoWare and the CoWare logo are registered trademarks of CoWare, Inc. All other trademarks are the property of their respective owners.
COPYRIGHT 2007 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2007, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jan 22, 2007
Words:740
Previous Article:Alvarez & Marsal Transaction Advisory Group Continues Expansion of National Practice.
Next Article:How a Maltese Dog Discovers Rock and Roll and Finds His True Calling: Children's Book Larry: the King of Rock and Roll Now Available Nationwide in...
Topics:



Related Articles
Common Emulation Interface Announced; Common Interface A Major Breakthrough For The Benefit Of Users.
Synopsys Honors CoWare With First Tenzing Norgay EDA Interoperability Achievement Award.
CoWare Adds IBM PPC750GX/GL Processor Support Package to SystemC-based Model Library; Latest Addition to the CoWare Model Library is First to Enable...
Arteris and CoWare Announce Integration of Arteris Network on Chip (NoC) Technology Into CoWare Platform Architect ESL Design Environment.
Sonics and CoWare Introduce Advanced Exploration Solution for Multiprocessor SoC Architectures.
CoWare Announces Open Release of SystemC Modeling Library (SCML) Source Code; Commitment Protects User Investment in CoWare's Standards-Based TLM...
CoWare Integrates Microsoft Windows Embedded CE on Virtual Platforms for Software Development.
CoWare and Tenison Accelerate Creation of Virtual Hardware Platforms for Architectural Exploration and Software Development.
CoWare Virtual Platforms Transform Enterprise Go-to-Market Strategies and Software Development Methodologies.
CoWare Virtual Platform Product Family Adopted by Fujitsu For Completing Their Next-Generation SoC Design Flow.

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles