Integrated passives technology and economics: the latest from the recent NEMI roadmap.

The term passives usually refers to resistors, capacitors and inductors but can also include thermistors, varistors, transformers, temperature sensors and almost any non-switching analog device. The concept of "integrated," "integral," "embedded," "arrayed" or "networked" passives involves manufacturing the passives as a group in or on a common substrate, instead of in their own individual packages.

Passive components, primarily resistors and capacitors, make up the majority of components found in electronic circuits. Integrating, or embedding, these components promises breakthroughs in performance, size and, eventually, cost. However, poor economic and business conditions have hampered the infrastructure development needed for widespread deployment of embedded passive components.

The 2002 NEMI Roadmap finds that performance is the main driver for embedded passives while the lack of design and simulation tools and test equipment is the primary hindrance. Despite these problems, implementation of embedded passive components has been accomplished by manufacturers who have internally developed design tools to circumvent infrastructure weaknesses.

Passive Component Usage

The importance of embedding passive components is seen when the usage rates are charted for portable devices, such as cell phones, personal digital assistants (PDAs), digital cameras and PCMCIA cards. Table 1 illustrates the predominance of passive components in portable products.

Surface-mounted discrete passives typically account for 30% of the solder joints, 40% of the board area and up to 90% of the placement time for an average electronic assembly. One-to-one replacement of embedded for discrete passives would use the singulated construction shown in Figure 1. This configuration can be used for both resistors and capacitors.

[FIGURE 1 OMITTED]

With singulated construction, several techniques are available. Subtractive processes require that an entire layer be inserted and patterned; additive processes apply a metal film or a filled polymer in a particular surface area, which is then trimmed to tolerance.

An alternative to singulated construction is distributed planar construction, where the entire plane between power and ground is used as a capacitor, as shown in Figure 2. In this case, a single decoupling capacitor covers the entire plane. Each capacitive decoupling requirement is met by dropping a via to the same power-ground electrode plane. The low-inductance path of the via allows high-speed performance. (1)

[FIGURE 2 OMITTED]

A recent example of a singulated embedded capacitor is the mezzanine capacitor used by Motorola in certain cell phones. (2)

To Embed or Not to Embed?

The decision of whether to use a discrete or integrated/embedded solution depends on the application, cost, performance or perhaps some other metric. Several materials properties must be considered when making the decision of whether or not to embed a particular component in a circuit:

* available tolerance of the integrated/embedded parts

* drift limits following thermal shock or humidity exposure

* aging behavior

* temperature coefficients of capacitance or resistance (TCC/TCR)

* power handling capacity (may include geometry of part)

* breakdown field and leakage currents for capacitors

* Q--especially important for radio frequency (RF) and filter applications.

Additional concerns include:

* parts needed for circuit tuning (difficult with embedded parts)

* special requirements for some parts such as low noise metal film resistors

* available space for embedded parts, especially large capacitors

* density of embedded parts and the cost-effectiveness of the embedding process.

Figure 3 illustrates the embedded passive selection process with cost as a driver. The passive bill of materials is first limited by the component values and tolerances vs. the available embedded passive technologies. Then, critical components, such as those required for circuit tuning, high Q, or low noise, are screened out. Third, space concerns are examined to be sure all of the embedded parts will fit in the required geometry, choosing a combination of parts that fit both physically and logically. Finally, cost must be considered, as it is the driver in this example.

[FIGURE 3 OMITTED]

In addition to deciding whether a set of components should be embedded, determining which embedding type will be used is necessary--whether it be a true embedded passive, an integrated passive device (IPD), or another type (see sidebar for definitions). Table 2 compares the various device types by criteria such as cost, size, performance and reliability. The selection of the right embedded component type is just as critical, if not more so, than the selection of the components to embed.

The Economics of Embedding Passives

Economics encompasses an assessment of the total lifecycle costs of a design decision, including design, manufacturing, test, marketing, product maintenance and end-of-life disposition. The decision to convert discrete passives to embedded passives is more complicated than simply reducing the cost of part procurement and paying more for the board. A host of other cost and benefit issues also affects lifecycle economics at some level.

Embedded passives are fabricated within organic or ceramic substrates, and, while embedded passives will never replace all passive components, they provide potential advantages for many applications. The generally expected advantages include:

* increased circuit density achieved by saving real estate on the substrate

* decreased product weight

* improved electrical properties through additional termination and filtering opportunities and shortening electrical connections

* cost reduction by reducing component count on board surface

* increased product quality through the elimination of incorrectly attached devices

* improved reliability through the elimination of solder joints.

Potentially the biggest single question about embedded passives is their cost. (4,5) Considerable controversy surrounds, however, whether applications fabricated using embedded passives will be able to compete economically with discrete passive technology. On the bright side, the use of embedded passives reduces assembly costs, shrinks the required board size and negates the cost of purchasing and handling discrete passive components. These economic advantages must be weighed against the increased cost (per unit area) of boards fabricated with embedded passives--a situation that will not disappear over time--and possible decreases in throughput of the board fabrication process.

Materials, Manufacturing Needs

The materials and manufacturing infrastructure is still not large enough to support widespread use of embedded passives. In addition, some problems need to be addressed.

Significant progress has been made in the development of several new materials, including:

* very thin core laminates, some with ceramic-loaded dielectrics

* ceramic and ceramic-loaded capacitor pastes

* plated resistors

* deposited thin-film resistor foils

* polymer thick-film resistor pastes.

Although some of these are, or soon will be, commercially available, several technology improvements must take place to enable this technology to meet cost, tolerance and high-speed performance objectives. Some of the most significant technology needs are discussed below.

Need for design tools. One of the most significant roadblocks to embedded passives is a lack of design tools. Companies that have implemented embedded components have been forced to develop their own design tools. The tool vendors appear to be lagging the technology rather than leading, and the lack of design tools will impede large-scale adoption of the technology. Recently, a Danish Company (DDE USA Inc) has been marketing design tool software that can include embedded capacitors, resistors and inductors. This software may end the "chicken and egg" stalemate that has existed for several years.

Determine the amount and distribution of capacitance required for decoupling with integrated capacitors. The much lower inductance of integrated decoupling capacitors enables less total capacitance to be used, since surface-mount decoupling strategies typically string excess capacitance in parallel to lower the overall inductance. How much less and how the total decoupling capacitance should be optimally arranged is not known.

Achieve a manufactureable 0.31[micro]F/[cm.sup.2] for organic substrates. This goal might be accomplished by lowering the processing temperatures for ferroelectric dielectrics, decreasing the thickness of paraelectric dielectrics or embedding high-k materials after they are formed.

Develop high [ohm]/square thin film resistor materials. Good materials now exist for low range (100 to 300 [ohm]/sq) such as TaNx, CrSi and NiCr. However, a 1,000 to 10,000 [ohm]/sq range is needed, and no easily manufactured materials are available at this time.

Improve polymer thick film (PTF) resistors. The mechanisms of value drift and reliability are understood. Once they are solved, the low price and equipment requirements of PTF resistor material would make integration relative to thin film materials very attractive.

Determine yield and reliability of large-area thin film embedded capacitors. High-value integrated capacitors might have large areas (Greater than 1 [cm.sup.2]). These large aspect ratio films might be prone to mechanical damage from coefficient of thermal expansion (CTE) mismatch, bending and electrostatic discharge (ESD), Improved reliability is often cited as a reason for integrating passives, but new failure mechanisms will certainly be present in the new technology.

Test equipment for embedded resistors and capacitors. Some flying probe testers are capable of testing resistors on inner layers prior to PCB lamination; however, no equipment can test individual capacitors on inner layers. The 2002 NEMI roadmap has identified this technology gap and is initiating a project to develop a tester that can test both embedded resistors and capacitors at the inner layer level and composite level.

Conclusion

Cost, performance and size continue to he critical factors in electronics assemblies, especially for portable products. By embedding passive components such as resistors and capacitors in the interconnect substrate, manufacturers can potentially gain significant advantages in all three of these areas. However, implementation of embedded passives has been delayed by poor economic conditions. Both technology and infrastructure development are required for this approach to gain widespread use, and cost issues need to be addressed. Nonetheless, some companies are beginning to use embedded component technology, and it is an area that holds great promise for future electronics manufacturing.

TABLE 1: Active and passive components for selected
portable products.

                      Number         Number        Passives to
Product             of Passives    of Actives     Actives Ratio

Sony HandyCam         1,329            43            31:1
Motorola StarTac        993            45            22:1
Nokia 2110              432            21            20:1
Ericsson 338            359            25            14:1

TABLE 2: Considerations in selecting passive component technologies.

                     Discretes

Cost                 Good--the benchmark
                     for all other technologies

Size                 Good--board area
                     required for each and
                     every device

Performance          Good--self resonates
                     at low frequencies

Reliability          Good--heavy use
                     of solder joints

Flexibility          Best--most flexible
                     for both design and
                     manufacturing

Time to Market       Best--flexibility
                     allows quick turns

Availability         Best--highly available
                     from multiple sources

Component            Best--all values
Values               available at commodity
                     prices

Tolerances           Best--tight tolerances
                     available at commodity
                     prices

                     Arrays Networks

Cost                 Better--when local
                     densities have 4 or 8
                     devices close together

Size                 Better--50% and greater
                     board area savings over
                     discretes

Performance          Good--self resonates
                     at low frequencies

Reliability          Better--reduces solder
                     joints slightly

Flexibility          Better--than IPDs and
                     integral

Time to Market       Better--simple quad
                     and octal arrays can be
                     designed in quickly

Availability         Better--standard parts
                     from multiple suppliers

Component            Better--thick film arrays
Values               offer high values

Tolerances           Better--both offer tight
                     tolerances

                     Integrated Passive Devices

Cost                 Better--when high local
                     densities are application
                     specific

Size                 Better--application-specific
                     IPDs can replace dozens of
                     components

Performance          Better--qualified out to
                     several gigahertz (GHz)

Reliability          Better--significantly
                     reduced solder joints

Flexibility          Better--than integral

Time to Market       Good--IPDs require
                     additional design iterations
                     for wireability

Availability         Better--non-standard parts
                     from multiple suppliers

Component            Good--thin films have
Values               limited C/A;R's limited by
                     low [p.sub.s] materials

Tolerances           Better--thin films offer
                     tight tolerances

                     Embedded Substrates

Cost                 Better--when average
                     component density is
                     above 3 devices/[cm.sup.2]

Size                 Best--no board area
                     required since the devices
                     are buried

Performance          Best--ideal components
                     when buried underneath
                     the integrated circuit
                     it serves

Reliability          Best--elimination of solder
                     joints

Flexibility          Good--requires modeling
                     and simulation

Time to Market       Good--most board shops
                     require >1 week to build
                     an integral board

Availability         Good--improving number
                     of suppliers

Component            Good--limited; low [p.sub.s] and
Values               low C/A--low component
                     values; new high [p.sub.s]
                     solutions now

Tolerances           Good--loose tolerance
                     (5-15%)

References

(1.) George Korony, et.al. "Controlling Capacitor Parasitics for High Frequency Decoupling," Proceedings 2001 IMAPS: October 9-11, 2001.

(2.) R.T. Croswell, Savic, M. Zhang, A. Tungare, J. Herbert, K. Noda, P. Tan, and W. Bauer, "Embedded Mezzanine Capacitor Technology for Printed Wiring Boards," presented at the IPC Printed Circuit Expo, Long Beach, CA, March 25-28, 2002.

(3.) J. Savic, R.T. Croswell, A. Tungare, G. Dunn, T. Tang, B. Lempkowski, M Zhang, and T. Lee, "Embedded Passives Technology Implementations in RF Applications," presented at the IPC Printed Circuit Expo, Long Beach, CA, March 25-28, 2002.

(4.) J. Rector, "Economic and technical viability of integral passives," in Proc. Electronic Components and Technology Conference, Seattle, WA, May 1998, pp. 218-224.

(5.) P. A. Sandborn, B. Etienne, and G. Subrananian, "Application Specific Economic Analysis of Integral Passives in Printed Circuit Boards," To be published IEEE Trans. Electronics Packaging Manufacturing.

Types of Passive Components

* Discrete Passive Component. This is a single passive element in its own leaded or surface-mount package. Example: a single resistor, capacitor or inductor in an 0402 package, This type of component will typically have two contacts to be soldered to the board. Presently, the vast majority of passives are utilized in this manner.

* Integrated Passive Component. These are multiple passive components that share a substrate and packaging. They may be housed inside the layers of the primary interconnect substrate, making them a subset of embedded passive components. Or they may be on the surface of a separate substrate that is then placed in an enclosure and surface mounted on the primary interconnect substrate, in which case they would be called passive arrays or passive networks (see below).

* Embedded Passive Component. This is formed or otherwise inserted into the primary interconnect substrate as opposed to being on the surface. The embedded passive component may be a singulated or distributed planar structure.

* Passive Array. Multiple passive components of like function are formed on the surface of a separate substrate and packaged in a single surface-mount case, which is then mounted on the primary interconnect substrate of the system. The number of leads will typically be twice the number of internal components in the array, but more leads may be provided to reduce the total inductance in capacitor arrays. Conversely, fewer leads may be present if some of the components are connected internally, such as for voltage dividers. Inductors are not normally arrayed since their separate electromagnetic fields would interfere with one another in close proximity. The passive array does not always reduce the number of leads that must be attached but does increase the efficiency of their attachment since more connections are made with one alignment and mounting. This is the lowest level of passive integration and may involve the same manufacturing techniques used for discrete components.

* Passive Networks. Multiple passive components of more than one function are formed on the surface of a separate substrate and packaged in a single surface-mount case, which is mounted on the primary interconnect substrate of the system. These typically have some internal connections to form simple functions such as terminators or filters. The number of leads can vary with functionality and the number of internal elements. This approach generally reduces the number of leads to be connected since some passive-to-passive connections are made within the package.

* On-Chip Passives. An on-chip passive is a passive element that is fabricated along with the active elements as part of the semiconductor.

Joseph Dougherty is an associate professor emeritus of materials and electrical engineering at the Penn State Materials Research Institute, State College, PA. He was also co-chair of the passive components chapter of the 2002 NEMI Roadmap. He may be reached at [phone]; email: Joe [e-mail].