Inspectech's KIS 2000 Dicing Yield Maximizer Scheduled for SEMICON West Introduction.

SAN JOSE, Calif.--(BUSINESS WIRE)--June 8, 1998--Inspectech Ltd., a one-year-old Israeli company, will demonstrate a new and highly-advanced system for the automatic inspection of diced semiconductor wafers during SEMICON West at the San Jose Convention Center, July 15-17.

Known as the KIS 2000 (Kerf Inspection System), the unit will be demonstrated in booth 9115 during SEMICON West. The KIS 2000 replaces traditional manual inspection performed after a wafer is diced to separate the individual integrated circuits in preparation for die attach, wire bonding and the rest of the assembly process.

The KIS 2000 was introduced to the market in April 1997 and is already in place at several major semiconductor suppliers in the United States and Europe, including Motorola in Phoenix, Ariz. "Judging by the early success and interest shown in the KIS 2000, the system answers many of the needs of semiconductor manufacturers for a time-saving, cost-effective way to enhance yield and throughput at the dicing stage," said Avi Ben-Har, Inspectech's vice president of sales and marketing.

Attributes of the KIS 2000 include automatic inspection of both sides of the wafer for topside and backside chipping and cracking. The KIS 2000 also monitors kerf chipping sizes, kerf width, misalignment and offset, as well as chipping proximity to the edges. The system continuously stores information on defects, providing statistical process control and permitting tracking of the dicing process.

Employing unique computer algorithms, during topside inspection the KIS 2000 can differentiate between chipping and test pattern shapes, silicon dust particles and virtually all other anomalies--a difficult and cumbersome task when performed visually by human operators.

During backside wafer inspection, cracking may result in silicon pieces breaking away from the die when it is attached to the leadframe. Since backside cracks may expand into the active die layers due to thermal stresses, their early detection is a critical part of the KIS 2000's inspection capabilities.

Depending on user needs, the KIS 2000 system can inspect predefined wafer locations or randomly select sites based on a pre-established sample percent. One system can monitor the output of several dicing saws, making the KIS 2000 highly cost-effective on the assembly line. SPC is done per wafer, per lot and per saw, which enables close monitoring for continuous improvement of overall yield and throughput. The KIS 2000 enables scheduling the preventive maintenance of dicers and wafer mounting equipment based on process data rather than time.

Through the SPC program, defect trends are quickly and easily seen on the system monitor and can also be viewed from a remote site through the user's computer network, in addition to being reported in hard copy form by the onboard system printer. Any drift in the process is anticipated by the KIS 2000 before costly yield loss becomes a factor.

The SPC program also offers chipping mapping and proximity mapping. In chipping mapping, chips are displayed in dynamic maps on the system monitor, according to size, which enables the detection of concentrations. These concentrations are often a result of chuck wear, misalignment in wafer mounting and other process changes.

Proximity, the distance between the kerf and the die edge or other limit line, is also mapped by the system software in dynamic maps. A "slider" enables setting the proximity map to detect variable-sized spots.

The program also offers users chipping histograms via the KIS 2000 monitor, the PC network or hard copy. These charts reflect the correlation between the chipping population and sizes on each of the two edges of the kerf, which belong to the two sides of the dicing blade.

Any significant change in the correlation factor indicates a major drift in the dicing process. This, in turn, signals a possible inconsistency of blade quality, faulty adhesive tape or in wafer mounting. -0-

         Specifications:

         Footprint:                 47.3 inches(w) x 45.3 inches(d) x
                                        66.1 inches(h)
         Wafer diameter:            Up to 200 mm (300 mm optional)
         Automation wafer loading:  optional
         Wafer inking:              optional
         SPC analysis software:     standard
         Computer:                  Intel Pentium(R)200 mHz with MMX
         OS:                        Windows(R) NT
         Frame grabber:             Matrox PCI frame grabber
         Z-stage:                   25mm @ 0.1 um accuracy
         X-Y stages:                300 mm @ 2 um accuracy
         Camera:                    B/W CCD high-resolution camera
         Microscope:                2.5x to 10x magnification;
                                    0.1 NA, controlled light source

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Inspectech Ltd. was formed in 1996 in Israel by veterans of Kulicke & Soffa Industries, the largest supplier of integrated circuit assembly equipment in the world, and KLA (now KLA-Tencor) a leader in measurement systems for the semiconductor industry.

Worldwide sales are factory direct from Carmiel, Israel, with a new sales and service office scheduled to open soon in Phoenix, Ariz.

CONTACT: Inspectech Ltd.

Avi Ben-Har, (011) 972-9-950-5660

fax: [phone]

or

Technology Marketing

Ron Iscoff, 209/824-1289, fax: [phone]