Infineon Introduces New 16-bit Microcontroller Core.Business Editors/High-Tech Writers MUNICH, Germany--(BUSINESS WIRE)--Nov. 21, 2000 C166S V2 Is Latest Enhancement to Widely Popular Embedded Architecture for Automotive, Industrial Computing and Consumer-Applications Infineon Technologies (FSE FSE 1. feline spongiform encephalopathy. 2. focal symmetrical encephalomalacia. :IFX IFX - ["Type Reconstruction with First-Class Polymorphic Values", J. O'Toole et al, SIGPLAN Notices 24(7):207-217 (Jul 1989)]. ) (NYSE NYSE See: New York Stock Exchange :IFX) today announced the release of a new, high-performance version of the C166 microcontroller core. Designed to significantly boost system performance and support higher levels of integration in System-on-Chip (SoC) custom integrated circuits (ICs) and standard product designs, the new C166S V2 microcontroller core is ideal for applications in automotive, industrial computing and consumer-markets. The addition of the C166S V2 to Infineon's popular and well accepted 16-bit microcontroller family more than doubles the potential performance of C166 architecture designs. The microcontroller can operate at clock frequencies up to 200 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. and, as a result of architectural refinements, is capable of executing most instructions in one clock cycle. The new core also is fully instruction compatible with all previous C166 microcontrollers, which allows the reuse of existing software, reducing design cost and risk while speeding time to market for many designs. As part of Infineon's strategy to provide a complete range of advanced processor cores, the C166S V2 will be available for open licensing in 2001. The core joins a portfolio of technologies available from Infineon, including the 32-bit TriCore(TM) Unified Processor and the CARMEL(TM) DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive cores, that provide IC designers with exceptional flexibility and system performance. "The C166S V2 core was designed to meet market requirements for an embedded control architecture for real-time systems, with solid performance in the digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). tasks which used to be handled by separate hardwired algorithms or stand-alone DSPs," said Tony Webster, Senior Vice President of the Cores and Modules Group at Infineon Technologies. "Used by itself, or combined with other modules and cores in our portfolio that offer increasing levels of control and DSP performance, designers can implement single- and multi-core systems with the flexibility and scalable performance required for an exceptionally wide range of applications." The C166S V2 includes a MAC (Multiply And Accumulate) unit, integrated into the Fixed Point Unit (FxPU) of the core architecture, which can be used to implement a FIR (Finite Impulse Response (electronics, DSP) Finite Impulse Response - (FIR) A type of digital signal filter, in which every sample of output is the weighted sum of past and current samples of input, using only some finite number of past samples. ) filter function with one tap per cycle. The FIR filter is a widely used function in DSP and communication applications. Other features of the new architecture include a new Instruction Fetch Unit (IFU IFU Instructions for Use IFU Integral Field Unit IFU Industrialiseringsfonden for Udviklingslandene (Danish: Industrialisation Fund for Development Countries; Copenhagen, Denmark) IFU Interface Unit IFU Indications for Use ), an Address and Data Unit (ADU ADU Automatic Dialing Unit ADU Array Diagnostic Utility (Compaq) ADU Automatic Duplexing Unit ADU Ammonium Diuranate ADU Analog-to-Digital Unit ADU Adamson University (Manila, Philippines) ), support for Dual-Port RAM, a Write Buffer and three register banks. These three local register banks provide fast response to interrupts and very fast context switching, a feature of the original C166 architecture which has been improved in this version. The C166S V2 also incorporates On-Chip-Debug-Support (OCDS OCDS On Chip Debug Support OCDS Order of Carmel Discalced Secular OCDS Overseas Cargo Delivery System OCDS Offline Control Data Set OCDS Object-Oriented Control Dependence Subgraph OCDS Optical Color Display System ) level 1, providing a cost effective method for system emulation even in multi-core SoC designs, using breakpoints, memory/register inspection, and single step execution. The patented security mechanism of the debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. port provides full protection of the on-chip IP (hardware and software) while maintaining unrestricted debug capabilities. The C166S V2 is a fully synthesizable core, optimized for System-on-Chip applications in embedded designs. Using Infineon's broad experience in microcontrollers, intellectual property and advanced chip manufacturing technologies, core-based designs can be optimized for specific system requirements. The core delivers a scalable performance up to 200 MHz together with a low power consumption, making the new C166S V2 ideal for portable applications like mobile information appliances, portable devices, PDAs, etc. The new core currently can be manufactured using Infineon's proven 0.18 micron, logic-based, embedded DRAM process technology. It is supported by software and development tools from Infineon and a wide range of third party vendors, including Nohau and Tasking. Infineon developed the original 16-bit C166 architecture in the early 1990s, and it is now established as one of the industry's most successful 16-bit microcontroller families. Since its introduction the architecture has been incorporated into designs accounting for more than 100 million units shipped in the fiscal year 1998/1999. The new C166S V2 core was developed jointly by Infineon Technologies and ST Microelectronics, which is a long-time licensee of the architecture. About Infineon Infineon Technologies AG, Munich, Germany, offers semiconductor and system solutions for applications in the wired and wireless communications markets, for security systems and smartcards, for the automotive and industrial sectors, as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In the fiscal year 2000 (ending September), the company achieved sales of Euro 7.28 billion with about 29,000 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange Frankfurt Stock Exchange The largest of Germany's eight securities exchanges, operated by Deutsche Borse AS. and on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. (ticker symbol Ticker Symbol An arrangement of characters (usually letters) representing a particular security listed on an exchange or otherwise traded publicly. When a company issues securities to the public marketplace, it selects an available ticker symbol for its securities which investors : IFX). Further information is available at www.infineon.com This press release and a press photo are available at http://www.infineon.com/news |
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