In case you missed it.
"Cleaning Qualification Methodology for Inline Aqueous Assembly Process"
Author: Steven Perng; email@example.com.
Abstract; This assessment of the cleanliness of the area beneath a component uses an 8" * 9" * 0.093" test vehicle with FR-4 laminate, OSP surface finish, and 21 package types. The TVs underwent assembly and inline aqueous cleaning. The two test methodologies used were ion chromatography and electromigration. Based on the test results, most of components pass the criteria, except three high-pin-count LBGAs, which showed high levels of bromide using a certain paste. No significant differences were found between the low standoff components group and other groups. Among the four low standoff components, LGA133, which has the lowest standoff, shows a higher total anion level. Test results also verified that, within the similar package types, the ionic level is likely proportional to the stencil paste volume. There were no statistical differences among the three time-to-wash cases: If the board is washed within 72 hrs., there is no significant difference on ionic level. (IPC Midwest, September 2008)
"REACH for Electronics Manufactures"
Author: John Fox; firstname.lastname@example.org.
Abstract: REACH presents a new set of direct and indirect risks for article manufactures. Direct risks arise from obligations explicitly outlined in the REACH regulation itself: article 7 and 13. Indirect risks arise from upstream and downstream supply chain ripple effects caused by REACH. These ripple effects will impact article manufacturers, including those who do not import directly into the EU. Article manufacturers--particularly those with complex products and supply chains--are adopting data-driven risk management approaches to help ensure the future viability and profitability of their products. This presentation presents a framework to identify and mitigate REACH risks, both direct and indirect. It outlines a fact-based and systematic approach, describing what product and supply chain data are needed and how to make decisions based on these data. This paper is based in part on the REACH initiatives underway at several large MNCs. (IPC Mid-west. September 2008)
"Large Scale 3-D Vertical Assembly of Single-Wall Carbon Nanotubes at Ambient Temperatures"
Authors: Evin Gultepe, Dattatri Nagesha, Bernard Didier Frederic Casse, Selvapraba Selvarasah, Ahmed Busnaina and Srinivas Sridhar; email@example.com.
Abstract: The authors demonstrate 3-D directed assembly of single-wall carbon nanotubes (SWNT) into porous alumina nanotemplates on silicon substrates by means of electrophoresis and dielectrophoresis at ambient temperatures. Assembled SWNT provided and interconnection between the surface and base of the nanotemplate. I-V measurements clearly show that the connection between silicon and SWNT is established inside the templates. This technique is particularly useful for large-scale areas under mild conditions for nanoscale electronic applications. (Nanotechnology, Oct. 8, 2008)
Solder Joint Reliability
"1st Order Failure Model for Area CSP Devices with Pb-Free Solder"
Authors: Nathan Blattau, Joelle Arnold, Gerd Fischer, Craig Hillman; firstname.lastname@example.org
Abstracts: The thermomechanical reliability of solders with little or no silver is not well known because the main focus has been on improving the solder interconnects' mechanical shock/drop performance. This study presents preliminary thermal cycling data for a SnNiCu-soldered area array CSP. These data are then used to develop a first-order analytical model to make thermal mechanical fatigue life predictions. The model uses basic distance to neutral point and continuous attach type equations to predict the strain energy dissipated by the solder joint. The energy dissipation is used to make fatigue predictions. (IPC Midwest, September 2008)
"Design for Manufacturing in Lead-Free Wave Solder Process"
Author: Ramon Mendez; email@example.com.
Abstract: The effect of pin-to-hole ratio, quantity of large copper planes connected to a pin through-hole barrel, connection types for PTH and land patterns for glue and wave chip components are some of the main features that require further investigation for design optimization. It is also important to determine if a set of DfM guidelines result in similar results among the various Pb-free alloys. This paper discusses the outcome of a study of several DfM features incorporated on an internally designed test vehicle created to evaluate alternative Pb-free alloys. DfM features included land pattern design and varying component spacing for chip components, pin-to-hole ratio and its interaction with the quantity of large copper planes connected to a PTH, quantity of large copper planes connected to a PTH and its interaction with the type of connection either solid or four spokes. The TV was assembled with four Pb-free alloys (SnCuNi, SnAgCuBi, SnCuX and SAC 405) and Sn Pb37 alloy as a baseline. (IPC Midwesst, September 2008)
CIRCUITS ASSEMBLY provides abstracts of papers from recent industry conferences and company white papers. With the amount of information increasing our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.