Ikanos Communications Selects Tharas Systems' Hammer to Accelerate Next Generation VDSL/ADSL Chip Verification.

Business Editors/High-Tech Writers

SANTA CLARA, Calif.--(BUSINESS WIRE)--March 5, 2003

Tharas Systems, Inc., a provider of high-performance, hardware-assisted design verification solutions, announced today that the leading fiber-fast broadband access vendor Ikanos Communications has incorporated Hammer into its functional verification flow.

"Ikanos evaluated competing hardware acceleration solutions and found that Hammer offers the fastest compile time and met our acceleration expectations over software based solutions. Fast compile times are very important to us, as during the development stage, RTL changes are frequent. We were able to switch to a Hammer verification flow in just one week," says Anoop Khurana, Vice President of Engineering at Ikanos Communications. "The product works just like they advertise and the price/performance ratio is excellent. Furthermore, we plan to run a lot more simulation cycles in our multi-chip system simulation environment with the Hammer solution."

"The broadband communication chip-set design is a verification-intensive process. Software simulators quickly run out of steam when you start applying system level, real-world tests. We are pleased that Ikanos Communications chose Hammer over competitive offerings. This is yet another validation of Hammer's superior solution in terms of compile times, run times, debug productivity, and ease of use,'' notes Prabhu Goel, Chairman & CEO of Tharas Systems.

Tharas Systems' Hammer provides Verilog, VHDL and mixed language accelerated simulations with the fastest compile and run times, while at the same time offering ease of use and debug capabilities comparable to that of software simulators. Compile times are as fast as 5 minutes per Million RTL Gate-equivalent on a single Sun Ultra-60 class workstation vs. up to eight hours per Million RTL gate-equivalent for competing FPGA-based systems. Run times range from 10 to 1000 times faster than software simulators. Hammer's innovative hardware architecture is based on the state-of-the-art custom processor technology that bypasses Rent's rule and a proprietary backplane that delivers more than 10 Gbps bandwidth, thereby minimizing run time degradation during debug. In addition, Hammer offers 100% source-level visibility without having to reconstruct signals - a significant improvement over other hardware-assisted verification solutions.

Hammer works with existing RTL and gate-level verification environments. As a result, designers can plug-n-play their existing verification software, including the most popular Verilog HDL-based simulators from Synopsys, Inc. (NASDAQ:SNPS), Cadence Design Systems, Inc. (NYSE:CDN) and Mentor Graphics (NASDAQ:MENT) and Debussy debug environment from Novas Software.

Hammer supports design sizes of up to 128 Million Gate-equivalent RTL code, and 16 Gigabyte of in-system memory. Hammer pricing ranges from US$115,000 to US$1,980,000.

About Tharas Systems

Tharas Systems develops and markets high performance verification systems to designers of complex integrated circuits and electronic systems. The Tharas solution leads to significant shortening of the verification cycle; the payoff is material reduction in time-to-market. Hammer(TM) offers a patented, next-generation hardware accelerator for Verilog, VHDL and mixed language simulations with the fastest compile times and run times, while at the same time offering ease of use and debugging capability comparable to that of software simulators. Increasing verification complexity is one of the main challenges of designing complex integrated circuits and systems today. Founded in 1998, Tharas is privately held and funded by venture capital and private investors from throughout the electronics industry. Corporate headquarters is located at 3016 Coronado Drive, Santa Clara, Calif. 95054. Visit Tharas Systems at http://www.tharas.com/. For more specific product information, email [e-mail] or call 1-408-855-3200.

Hammer(TM) is a trademark of Tharas Systems Inc. Tharas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.