ISE Launches RF/CMOS Noise Analysis Simulation Tool Based On Technology Co-developed By ISE, ETH And Toshiba.Business Editors/Technology Writers ZURICH, Switzerland--(BUSINESS WIRE)--April 27, 2000 Integrated Systems Engineering (ISE Ise (ē`sā), city (1990 pop. 104,164), Mie prefecture, S Honshu, Japan, on Ise Bay. It is one of the foremost religious centers of Shinto, the site of the shrines of Ise. ) today announced a new product launch after completion of a joint development program for noise analysis simulation with ETH eth n. Variant of edh. and Toshiba. This joint development program was an example of close cooperation of industry and academia leading to the successful commercialization of advanced software tools for use in leading-edge semiconductor-device design. The need for noise analysis was driven by Toshiba's Networks and Telecom Group's design requirements for RF (radio frequency) CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. devices. The result of this effort is the first available accurate and robust commercial solution for noise analysis implemented in the most robust tool available for semiconductor device simulation. "Toshiba realized the need for noise analysis in applying first principles to the design of RF CMOS devices," said Shigeru Komatsu, General Manager, Systems LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Division, Networks and Telecom, Toshiba. "Through the joint development efforts, Toshiba can now take advantage of noise analysis in combination with the strong device simulation tool offering of ISE." The research for the noise analysis code was performed in the Integrated Systems Laboratory (company) Integrated Systems Laboratory - A joint project of Control Data Corporation and NCR Corporation, established in 1973 and dissolved in 1976. Integrated Systems Laboratory developed Software Writer's Language. Address: Escondidio, California, USA. , ETH, Switzerland and was based on data provided by Toshiba. The new capability facilitates performance of accurate noise analysis for 1/f, generation-recombination and thermal noise. "This joint development is an outstanding example of the kind of industry-university relationships through which ISE has so successfully advanced technology to benefit our customers," said Wolfgang Fichtner, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of ISE. "We have always been proactive in developing the advanced software and models needed by our customers so they can be highly competitive in their own field." ISE will make the noise analysis capability available with its next release of the DESSIS DESSIS Device Simulation For Smart Integrated Systems (TM) device simulator Version 6.1, scheduled for Q2 2000. DESSIS(TM) is the TCAD TCAD Technology Computer-Aided Design TCAD Tompkins County Area Development (Ithaca, NY, USA) TCAD Travis Central Appraisal District (Austin, Texas) TCAD Tennessee Commission on Aging and Disability industry's leading simulator of semiconductor devices and handles structures and doping doping, in electronics: see semiconductor. Altering the electrical conductivity of a semiconductor material, such as silicon, by chemically combining it with foreign elements. profiles in both 2D and full 3D. ISE TCAD Software ISE's TCAD tools are particularly suited to the development of new semiconductor process technologies and complex microelectronic devices, offering solutions for complete 2D and 3D process and device simulation. DIOS-ISE is a process simulation tool set used by developers of silicon and advanced materials technologies, including SiGe. DIOS-ISE is the only commercial TCAD program that permits fully automatic meshing through highly adaptive grids without user intervention. The robustness and speed of the algorithms allow the software to handle the most complex fabrication fabrication (fab´rikā´sh  n),n the construction or making of a restoration. sequences with a very high degree of accuracy. DESSIS-ISE is a one-, two- and fully three-dimensional device simulator in a single tool. DESSIS-ISE handles arbitrary non-planar geometries and a wide range of semiconductor materials, including GaAs, SiC and SiGe. The unsurpassed speed and robustness of the software is achieved through highly efficient linear solvers. Advanced transport models are available for the complete range of devices from deep sub-micron structures all the way to full wafer-size power elements. GENESISe, an open graphical front end, provides an easy-to-use point and click user interface. The software gives designers the ability to build projects with complete simulation flow using a variety of tools, including any third party simulation tools. In addition, design of experiment (DOE), sensitivity analysis, optimization and statistical uncertainty analysis capabilities facilitate the search for devices with certain desired characteristics. About ISE ISE AG is a leading provider of TCAD tools worldwide. ISE focuses on TCAD, offering software solutions and consulting services for many of the world's leading semiconductor fabrication facilities. Founded in 1993, the company is privately held with headquarters in Zurich, Switzerland at Balgriststrasse 102, CH 8008 and a subsidiary ISE, Inc. located in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. at 111 N. Market Suite, Suite 800, San Jose, CA 95113. |
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