INFINEON INTRODUCES NEW 16-BIT MICROCONTROLLER CORE.

Infineon Technologies (FSE:IFX) (NYSE:IFX) has released a new, high-performance version of the C166 microcontroller core. Designed to significantly boost system performance and support higher levels of integration in System-on-Chip (SoC) custom integrated circuits (ICs) and standard product designs, the new C166S V2 microcontroller core is ideal for applications in automotive, industrial computing and consumer-markets.

The addition of the C166S V2 to Infineon's popular and well accepted 16-bit microcontroller family more than doubles the potential performance of C166 architecture designs. The microcontroller can operate at clock frequencies up to 200 MHz and, as a result of architectural refinements, is capable of executing most instructions in one clock cycle. The new core also is fully instruction compatible with all previous C166 microcontrollers, which allows the reuse of existing software, reducing design cost and risk while speeding time to market for many designs.

As part of Infineon's strategy to provide a complete range of advanced processor cores, the C166S V2 will be available for open licensing in 2001. The core joins a portfolio of technologies available from Infineon, including the 32-bit TriCore(TM) Unified Processor and the CARMEL(TM) DSP cores, that provide IC designers with exceptional flexibility and system performance.

The C166S V2 includes a MAC (Multiply And Accumulate) unit, integrated into the Fixed Point Unit (FxPU) of the core architecture, which can be used to implement a FIR (Finite Impulse Response) filter function with one tap per cycle. The FIR filter is a widely used function in DSP and communication applications. Other features of the new architecture include a new Instruction Fetch Unit (IFU), an Address and Data Unit (ADU), support for Dual-Port RAM, a Write Buffer and three register banks. These three local register banks provide fast response to interrupts and very fast context switching, a feature of the original C166 architecture which has been improved in this version.

The C166S V2 also incorporates On-Chip-Debug-Support (OCDS) level 1, providing a cost effective method for system emulation even in multi-core SoC designs, using breakpoints, memory/register inspection, and single step execution. The patented security mechanism of the debug port provides full protection of the on-chip IP (hardware and software) while maintaining unrestricted debug capabilities.

The C166S V2 is a fully synthesizable core, optimized for System-on-Chip applications in embedded designs. Using Infineon's broad experience in microcontrollers, intellectual property and advanced chip manufacturing technologies, core-based designs can be optimized for specific system requirements. The core delivers a scalable performance up to 200 MHz together with a low power consumption, making the new C166S V2 ideal for portable applications like mobile information appliances, portable devices, PDAs, etc.

The new core currently can be manufactured using Infineon's proven 0.18 micron, logic-based, embedded DRAM process technology. It is supported by software and development tools from Infineon and a wide range of third party vendors, including Nohau and Tasking.

Infineon developed the original 16-bit C166 architecture in the early 1990s, and it is now established as one of the industry's most successful 16-bit microcontroller families. Since its introduction the architecture has been incorporated into designs accounting for more than 100 million units shipped in the fiscal year 1998/1999. The new C166S V2 core was developed jointly by Infineon Technologies and ST Microelectronics, which is a long-time licensee of the architecture.