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IMP, Inc. Adds to Data Communication Offering; SCSI Ultra2 Multimode LVD/SE Terminators Extend Bandwidth to 80MBytes/SEC.


SAN JOSE, Calif.--(BUSINESS WIRE)--May 12, 1998--IMP, Inc. (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:IMPX) today announced the expansion of its SCSI SCSI
 in full Small Computer System Interface

Once common standard for connecting peripheral devices (disks, modems, printers, etc.) to small and medium-sized computers. SCSI has given way to faster standards, such as Firewire and USB.
 (Small Computer Systems Interface) data communications interface Integrated Circuit (IC) family with the addition of two new Low Voltage Differential (hardware) Low Voltage Differential - (LVD) A method of driving SCSI cables that will be formalised in the SCSI-3 specifications. LVD uses less power than the current differential drive (HVD), is less expensive and will allow the higher speeds of Ultra-2 SCSI. LVD requires 3.  (LVD See LVDS.

LVD - Low Voltage Differential
) Multimode Ultra2 SCSI Terminator ICs, the IMP5241 and IMP5242.

SCSI is an intelligent interface standard that controls the flow of data between the central processing unit See CPU.

(architecture, processor) central processing unit - (CPU, processor) The part of a computer which controls all the other parts. Designs vary widely but the CPU generally consists of the control unit, the arithmetic and logic unit (ALU), registers, temporary buffers
 of a personal computer (PC) and its peripherals and extends server-style data transfer rates to the PC arena.

These LVD SCSI devices represent the second family of circuits to result from the technology strategic alliance signed with Linfinity Microelectronics, Inc. in 1997. Both companies will offer these products fabricated from the same mask set. This insures identical in-system performance from two vendors. In addition, the IMP5241 is compatible with the DS2118M LVD terminator from Dallas Semiconductor.

The new IMP5241 and IMP5242 multimode SCSI terminator ICs conform to the Ultra2 Low Voltage Differential SPI-2 specification developed by the T-10 standards committee. The SPI-2 specification requires the use of a low voltage differential signaling technique to enable data transfers at speeds up to 80 megabytes per second (unit) megabytes per second - (MBps, MB/s) Millions of bytes per second. A unit of data rate. 1 MB/s = 1,000,000 bytes per second (not 1,048,576).  over 12-meter cable lengths. According to, Adaptec Inc., the industry's leading supplier of SCSI host adapters for desktop PCs and servers, the demand for increased bandwidth has allowed SCSI interfaces to increase their penetration of the market from 6% in 1992 to 12% in 1997. This new version will enable SCSI solutions to continue to increase their share of this fast growing market.

"Designed for the emerging Ultra2 SCSI market, our newest terminators provide further evidence of our solid commitment to the SCSI peripheral industry," said Barry Wiley, IMP Vice President of Marketing, Sales and Applications. "By staying ahead of the industry's LVD needs, we continue to support our customers' preparation for tomorrow's market with the latest IC designs."

"IMP has extensive experience supporting computer peripheral manufacturers, such as hard disk drive and tape storage companies who will be using these new terminator products," added Barry Wiley. "Our business is focused on the needs of these customers, and we have built-up our capability to manufacture the high volumes that the peripherals market requires."

In addition to meeting Ultra2 specifications, the new multimode terminators also ensure backward compatibility with legacy Single Ended (SE) SCSI-1, 2, 3, and Ultra (FAST-20) specifications.

The terminators provide both auto-selectable LVD differential mode and single ended termination. The auto-select feature enables these intelligent terminators to function in LVD differential mode, or if a legacy peripheral operating in single ended mode is detected, reconfigure the system for single-ended mode.

Each of the nine channels has completely isolated circuitry. This not only enhances reliability, but also provides a 35MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  bandwidth, typically 100 times faster than traditional SCSI terminator designs. The high bandwidth insures Ultra2 performance, up to 80 megabytes per second, while providing a clear migration path to Ultra-3 and beyond. Ultra-3 will increase data transfer rates to 1.28 gigabits per second (160 megabytes).

All IMP multimode devices feature auto-selectable LVD or SE (single-ended) termination, high-speed response without external capacitors and a high bandwidth driver that reduces channel-to-channel noise and crosstalk.

Automatic Mode Selection

Proper mode selection is automatic. If DIFFSENSE is below 0.5V single-ended operation is selected and if between 0.7V and 1.9V LVD operation is selected. Outputs are placed in a high-impedance state when DIFFSENSE is above 2.4V.

A sleep or disable mode reduces supply current to 10 microamperes maximum and puts the DIFFSENSE and outputs in a high impedance state.

Master/Slave Operation

Driving the Master/Slave pin LOW disables the on-board DIFFSENS DIFFSENS Differential Sense  reference, allowing the use of an external master reference. If the Master/Slave pin is allowed to float or is driven HIGH, the internal DIFFSENSE reference is active.

External Capacitors Eliminated

Other IC terminators require an external RC delay network to accommodate the100mS delay it takes between changes on the DIFFSENSE line and changes on their outputs. The IMP multimode parts include an internal digital counter that eliminates the external RC network.

In the LVD mode, a fast buffer instead of regulators that require external capacitors supplies the line common mode voltage. In SE mode, the devices operate in a nonlinear adaptive mode for close matching to actual SCSI bus impedance. Unlike most LVD multimode terminators, no external capacitors are required for references or regulators on the IMP multimode devices. Only a termpower bypass capacitor is required.

Pricing for the IMP5241 and IMP5242 in quantities of 1,000 is $3.41 for the 24-pin TSSOP TSSOP Thin Shrink Small Outline Package
TSSOP Thin Scale Small Outline Package
 package and $3.56 for the 36-pin SSOP SSOP Shrink Small Outline Package
SSOP Sanitation Standard Operating Procedures (USDA)
SSOP Sanitary Standard Operating Procedures
SSOP Sharescan-Open Platform (Ecopy)
SSOP Site Security Operational Procedures
 package. Production is scheduled to begin in June 1998.

Statements in this press release regarding IMP's business that are not historical facts are "forward-looking statements" that involve risks and uncertainties, including, but not limited to demand for the Company's products, foundry utilization, the ability of the Company to develop new products, demand by end-users of the products produced by the Company's customers, and the other risks detailed from time to time in the Company's reports filed with the Securities and Exchange Commission, including the Company's most recent Annual Report on Form 10-K Form 10-K

A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information.


Form 10-K

See 10-K.
 and Quarterly Report on Form 10-Q Form 10-Q

See 10-Q.
.

IMP, Inc. designs, manufactures, and markets standard-setting analog integrated circuits and specialty analog wafer foundry processes for data communications interface and power management applications in computer, communications, and control systems world-wide. Products are manufactured on CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. , BiCMOS, and EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting.  processes in the company's ISO (1) See ISO speed.

(2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI.
 9001 qualified wafer fabrication plant in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. .

Company headquarters are located at 2830 North First Street, San Jose, California, 95134-2071. Telephone: 408-432-9100. Fax: 408-434-0335. For further information about IMP, please visit our home page at http://www.impweb.com or Email info@impinc.com. -0-

Note to Editors: Photographs are available by calling 408/434-1467

CONTACT: IMP, Inc.

Barry Wiley, 408/432-9100 (Editor Contact)

bhwiley@impinc.com

or

David Gillooly, 408/434-1467 (Reader Contact)

daveg@impinc.com
COPYRIGHT 1998 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1998, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:May 12, 1998
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