IDT Expands Industry-Leading Dual-Port and FIFO Product Families; New Devices Represent Industry Firsts in Density, Performance and Value-Added Features.SANTA CLARA, Calif. -- Supporting the evolving bandwidth needs of the next-generation wireless and networking infrastructure, IDT IDT Integrated Device Technology, Inc. (Santa Clara, CA, USA) IDT I Don't Think IDT Identity Theft IDT Interrupt Descriptor Table IDT Integrated DNA Technologies IDT Inactive Duty Training IDT Instructional Design & Technology (TM) (Integrated Device Technology IDT (NASDAQ: IDTI) was founded in 1980 as a semiconductor vendor. Employing approximately 2500 people worldwide, headquartered in San Jose, California and operating a fab in Hillsboro, Oregon, the company both designs and fabricates semiconductor components. , Inc.)(Nasdaq:IDTI IDTI Integrated Device Technology Inc ), a leading communications IC company, today announced it has added new devices to its multi-port and first-in/first-out (FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out ) families. The new 36-Mbit synchronous dual-port device offers the industry's largest density and delivers 133 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. performance to address demanding applications such as wireless base stations, routers, and Ethernet, ATM and storage switches. Likewise, the new TeraSync(TM) FIFO is the first standalone device to support 18-Mbits of data buffering density at 225 MHz, replacing costly traditional methods of implementing high-density, high-speed buffering. With today's announcement, IDT builds on its leading position in delivering multi-port and FIFO products for the communications market. "IDT is committed to supporting wireless and networking systems designers through the delivery of value-added products that address ever-changing market requirements," said Ronald Jew, director of product management for multi-port and FIFO product lines. "With our new industry-leading 36-Mbit dual-port device, we leapfrog competitive offerings to ease design requirements and reduce system costs for our customers. At the same time, our new FIFO products deliver the industry's highest density to round out our extensive portfolio of more than 350 FIFO devices, demonstrating our leadership and reliability." New Dual-Port Device Leads Industry The market-leading 36-Mbit (1024Kx36) density of the IDT 70T3509M dual-port device reduces design time and system cost by eliminating the need to connect multiple devices in applications that require a large shared memory. Unlike competitive offerings, the new IDT dual-port device also provides the most comprehensive range of synchronous functionality, allowing designers to optimize their design for greater performance, lower power and the highest degree of contention management without the need for external devices. These synchronous functions include counters, multiple independent chip and byte enables, and synchronous interrupts. The device is available in a 256-BGA package, which provides at least 50 percent board-space reduction versus alternate multi-chip solutions, and is backward pin-compatible with the previous six generations of products, enabling an easy upgrade path with minimal board changes. Much like the company's earlier synchronous dual-port offerings, the IDT 70T3509M offers a 2.5-volt core for low-power consumption and selectable 2.5- and 3.3-volt I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output options for voltage bus matching between two separate domains. Other innovative functions include the sleep mode, which allows the product to minimize power consumption by placing the part in full standby mode without any input-level restrictions, and a Joint Test Action Group (JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group ) interface that allows designers to improve manufacturability with enhanced board debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. and production diagnostics. Additional product information can be found at http://www.idt.com/index.cfm?id=30. New IDT FIFOs Extend Industry's Broadest Portfolio Targeting next-generation wireless base stations and the digital home networking infrastructure, the new 225 MHz IDT 72T36135M FIFO dramatically eases system design and development costs by delivering 18-Mbits of buffering density in a single device. Previously, designers would either use two 9-Mbit FIFOs or design a FIFO controller using a field programmable gate array See FPGA. (FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. ) coupled with an external SRAM See static RAM. SRAM - static random-access memory , a costly method that required additional board space and a lengthy design and validation cycle. Such a design could achieve high-data throughput (8 Gbps in and 8 Gbps out) by going "massively parallel," resulting in the use of hundreds of costly FPGA I/Os and difficult and expensive routing of hundreds of I/O signals. The IDT 72T36135M contains a "mark and re-transmit" feature that enables the user to set a read marker on the queue. Mark and re-transmit also allows data to be reread Verb 1. reread - read anew; read again; "He re-read her letters to him" read - interpret something that is written or printed; "read the advertisement"; "Have you read Salman Rushdie?" once from the queue or multiple times if re-transmission of data is needed. The IDT 72T36135M offers several value-added functions, such as user-selectable I/O supporting 1.8-volt HSTL HSTL High-Speed Transceiver Logic (family of logic integrated circuits) HSTL High-Speed Transistor Logic (electronics) , 2.5-volt HSTL or 2.5-volt LVTTL LVTTL Low Voltage Transistor Transistor Logic (AMCC) LVTTL Low Voltage Transistor to Transistor Logic configurations on each port to simplify the interfacing of devices operating at different voltage levels, as well as frequency matching, and programmable empty, partially empty, full and partially full flagging. The FIFO is available in a space-saving 240-PBGA package and is 50 percent smaller than previous two-chip solutions. The device is backward pin-compatible with the company's existing 9-Mbit TeraSync FIFO products, enabling an easy upgrade path with no board changes and allowing a designer to populate a design with a wide range of buffer capabilities in a single board layout. Additional product information can be found at http://www.idt.com/products/fifo.html. Pricing and Availability The IDT 70T3509M 36-Mbit synchronous dual-port device is priced at $165.00 each in 10,000-unit quantities and is sampling now. The IDT 72T36135M 18-Mbit TeraSync FIFO device is priced at $150.00 each in 10,000-unit quantities and will begin sampling in January 2005. Download a high-resolution photo of the dual-port and FIFO devices at http://www2.idt.com/pressroom/imagebank/products.cfm. About IDT www.IDT.com. IDT, TeraSync, Interprise and the IDT logo are trademarks of Integrated Device Technology, Inc. Other brands, product names and marks are trademarks, registered trademarks, or trade names of their respective owners. |
|
||||||||||||||||

Printer friendly
Cite/link
Email
Feedback
Reader Opinion