IBM smooths bumping process.

San Francisco -- IBM's fabled C4 flip chip concept has been updated and was a popular attraction at a major semiconductor manufacturing expo in July. IBM's Peter Gruber has conceived a new solder bumping method that builds on the controlled collapse chip connect invention yet eliminates several steps--including all mold cleaning. Moreover, it is fluxless and can be used with any solder alloy.

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In concert with Suss MicroTec, the Munich-based semiconductor equipment supplier, IBM (ibm.com) has developed and commercialized C4NP (NP stands for "new process"), a solder transfer method in which molten solder is injected into pre-fabricated (and reusable) glass-molded etch cavities that correspond to solder bumps. The mold and wafer are aligned and the bumps transferred onto the entire wafer. It's a one-step solution: no lithography, no plating, no flux, complete alloy flexibility.

The companies rolled out both the invention and the wafer bonding equipment that makes it possible during SemiCon West in mid July. (The concept was also detailed in a paper presented at IMAPS in late June.)

According to Klaus Ruhmer, director of global marketing and sales for C4NP at Suss (suss.com), the process is capable of 25 [micro]m balls and 50 [micro]m pitches. It can be used on 300 mm or smaller wafers.

The companies are moving quickly to meet anticipated interest. External customer evaluations are scheduled to begin in September, with high volume production ramped in the March to April 2006 timeframe, Ruhmer told CIRCUITS ASSEMBLY.

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IBM has been working on C4NP for years. The company described a version of the process using eutectic solder as early as September 2000. But the push to lead-free alloys will provide a boost to C4NP, its inventors say. Conventional bumping uses high lead content alloys, which evaporate quickly. Lead-free alloys, however, have high tin content and evaporate much slower due to the low vapor pressure of tin. Printing has its warts, too. It requires parts to be reflowed, a process step that reduces solder volume and can cause voids. Also, problems can stem from the dimensional stability of the stencil, especially when 300 mm wafers are used. Plating baths are notoriously hard to control. "Lead-free wafer bumping is a painful process," Ruhmer says. "But everyone has to do it."

Testing at IBM showed remarkable uniformity in bump size and shape, with results for 200 mm wafers comparing "very favorably" to eutectic solder. Chip yield was 99.2% and bump yield was greater than 99.995% in trials on 36 processed wafers, IBM reported. The company says similar results are expected from 300 mm tests. Reliability data are currently being collected for the lead-free bumps.

Another promising bumping technology came from Cookson Electronics (cooksonelectronics.com). Cookson has worked closely with Electroplating Engineers of Japan (eeja.com), a supplier of electroplating equipment, to develop a process that can bump wafers in 60 sec. or less (total cycle time). The actual deposition process is on the order of 20 sec. (for a 100 [micro]m equivalent bump). Any solder alloy can be adopted to the process, Cookson said. The process can deposit 40 [micro]m bumps on 80 [micro]m pitch or deposit single spheres up to 400 [micro]m in diameter, all in under a minute.

According to Mike Marczi, director of business development at Cookson, XB3TM uses electrokinetic deposition to deposit particles of material. "This is not a current-driven (amps) process like electroplating, but works by creating local electrical fields across the surface of the wafer (voltage-driven). This means the driving force to deposit particles in the openings of the photomask is uniform regardless of the diameter of the wafer."

Also overheard: SMT gurus Rick Lathrop of Heraeus (4cmd.com) and Phil Marcoux of SensArray (sensarray.com) are working on a joint study of post-reflow yields relative to soldering profiles. Results are expected by November. SensArray is also developing a thermocouple-instrumented wafer to check wafer center-to-edge thermal stresses during loading and ramping, and calibrate temperature setpoints in ovens. Process Probe uses 64 TCs tied to a flex circuit for thermal management

Its former management team back in place, BTU International's (btu.com) rebound continues with consecutive profitable quarters and several updates to its line of Pyramax reflow ovens, including simplified software and nitrogen use reductions of more than 15%. The company said it sees assembly market sales growing 8% this year, with wafer-level packaging up 30 to 35%.

Edited by Mike Buetow