IBM Creates World's Highest Performing Nanotube Transistors; Carbon Nanotubes Exceed Performance of Leading Silicon Transistor Prototypes.

Business Editors/High-Tech Writers

YORKTOWN HEIGHTS, N.Y.--(BUSINESS WIRE)--May 20, 2002

IBM today announced it has created the highest performing nanotubes transistors to date and has proven that carbon nanotubes (CNTs), tube-shaped molecules made of carbon atoms that are 50,000 times thinner than a human hair, can outperform the leading silicon transistor prototypes available today.

As reported in the May 20 issue of the journal of Applied Physics Letters, IBM researchers have improved carbon nanotube transistors. By experimenting with different device structures, the researchers were able to achieve the highest transconductance (measure of the current carrying capability) of any carbon nanotube transistor to date. High transconductance implies that transistors can run faster, leading to more powerful integrated circuits. Furthermore, the researchers discovered that the carbon nanotube transistors produced more than twice the transconductance per unit width of top-performing silicon transistor prototypes.

With today's announcement, IBM is taking carbon nanotubes, the strongest and most conductive fibers known, another step closer to becoming a viable option for replacing silicon transistors in future devices.

"Proving that carbon nanotubes outperform silicon transistors opens the door for more research related to the commercial viability of nanotubes," said Dr. Phaedon Avouris, manager of nanoscale science, IBM Research. "Carbon nanotubes are already the top candidate to replace silicon when current chip features just can't be made any smaller, a physical barrier expected to occur in about 10 to 15 years."

Today's achievement builds on a series of major research breakthroughs by IBM scientists using carbon nanotubes to make tiny electronic devices. Last April, IBM became the first to develop a groundbreaking technique (Science, Vol. 292, Issue 5517, April 27, 2001) to produce arrays of carbon nanotube transistors, bypassing the need to meticulously separate metallic and semiconducting nanotubes. Last August, IBM announced the world's first logic circuit within a single nanotube (Nano Letters, vol. 1, number 9, September 2001, p. 453-456).

Creating the best-performing carbon nanotube transistors

The IBM scientists made single-wall carbon nanotube field-effect transistors (CNFETs) in a structure resembling a conventional metal-oxide-semiconductor field-effect transistor (MOSFET) structure, with gate electrodes above the conduction channel separated from the channel by a thin dielectric. They used these devices to study the performance improvements achieved by reducing the gate-to-channel separation. The top gate devices exhibited excellent electrical characteristics, including steep subthreshold slope (measure of how well a transistor turns on and off) and high transconductance at low voltages, a significant improvement to previously reported CNFETs which used the silicon wafer as a gate and a thick gate dielectric. The gate is an electrode that controls the flow of electricity through the device. Furthermore, the IBM scientists were able to fabricate both hole (p-type) and electron (n-type) transistors. The top-gate design allows independent gating of each transistor, making it possible to generate CMOS (complementary metal-oxide-semiconductor) circuits that have a simpler design and consume less power.

By creating CNFETS that are similar in structure to that of conventional silicon MOSFETs, the team was able to compare CNTs with silicon transistors. Usually transistor performance improves as the oxide thickness and channel length decrease. Although the nanotube devices were not optimized in this case, they still outperformed the prototype silicon transistor. The IBM Researchers concluded that as their gate length and gate oxide thickness decrease with further development, future CNFETs would likely outperform silicon transistors even more dramatically.

The report on this work "Vertical Scaling of Carbon Nanotube Field-Effect Transistors Using Top Gate Electrodes" by Shalom Wind, Joerg Appenzeller, Richard Martel, Vincent Derycke and Phaedon Avouris of IBM's T.J. Watson Research Center in Yorktown Heights, N.Y. is published in the May 20 issue of the journal of Applied Physics Letters.