IBM Boosts Power4+ Chips for pSeries 655 Midrange Line.
By Timothy Prickett Morgan
IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) Corp today will kick up the speed on the Power4+ processors that are used in its midrange pSeries 655 servers. The speed bump on certain pSeries configurations is the amounts to about 19% on integer and floating point workloads, which is good for customers - particularly in the high performance computing market where flops are important. Perhaps most significantly, IBM is offering the 1.7GHz Power4+ prices at the same price as the 1.5GHz version it put into the pSeries 655 in May 2003.
The pSeries 655 is an eight-way capable machine that has a single multichip module See MCM. (MCM (MultiChip Module or MicroChip Module) A chip package that contains several bare chips mounted close together on a substrate (base) of some kind. ) with four dual-core Power4+ engines. Customers can activate half the cores on each chip to make what looks like a four-way SMP (Symmetric MultiProcessing) A multiprocessing architecture in which multiple CPUs, residing in one cabinet, share the same memory. SMP systems provide scalability. As business increases, additional CPUs can be added to absorb the increased transaction volume. server to AIX (Advanced Interactive eXecutive) IBM's Unix-based operating system which runs on its Intellistation workstations and pSeries, p5, iSeries and i5 server families. , IBM's Unix variant, or activate all the cores to make an eight-way box. Either way, each pair of Power4 cores on a single chip inside the MCM has a shared L2 cache (Level 2 cache) A memory bank built into the CPU chip, packaged within the same module or built on the motherboard. The L2 cache feeds the L1 cache, and its memory is slower than L1 memory. The L2 cache feeds the L1 cache, which feeds the processor. that is 1.5MB in size. For workloads that are more L2 cache sensitive, only activating four Power cores per server is a better option since each core gets its own 1.5MB cache to play with.
The pSeries 655 was announced in November 2002 with 1.2GHz and 1.45GHz Power4+ processors. In May 2003, the pSeries 655 was available in two configurations: a four-way using 1.7GHz Power4+ chips or an eight-way using 1.5GHz Power4+ processors. IBM might have been having yield and heat issues with the 1.7GHz chips last year, which would explain why it was only offering them in four-ways. This would give customers with cache-sensitive workloads 20% more performance than they would get with a 1.5GHz chip. And the commercial customers who would want an eight-way box would care more about aggregate performance than L2 cache amounts, so dropping the speed of the eight-way pSeries 655 to 1.5GHz was probably not that big of a deal. It would also run cooler than an eight-way 1.7GHz model.
With today's announcement, IBM is offering an eight-way pSeries 655 with 1.7GHz Power4+ processors, 4GB of main memory, and two 36GB disks for the same $70,000 it was charging up until now for an eight-way using the 1.5GHz Power4+. The price of the 1.5GHz eight-way machine, says Jim McGaughan, director of pSeries marketing at IBM, has been cut to $61,910. There is no four-way configuration using the slower 1.5GHz Power4+ processors, but there is a four-way pSeries 655 with 1.7GHz processors with 4GB and two disks that now sells for $47,625.
In addition to the processor changes, IBM has also expanded the maximum main memory capacity of the pSeries 655 from 32GB to 64GB.
All of these machines include an AIX 5L 5.2 license. The 1.7GHz Power4+ processors will be available worldwide starting February 6.
The pSeries 655 servers can be clustered together using the "Colony" SP2 switch or the faster "Federation" HPS See Seer*HPS. switch when running AIX. Customers running Linux workloads and IBM's Cluster Service Manager software have to get by with Gigabit Ethernet An Ethernet standard that transmits at 1 Gbps. Used mostly to connect high-end workstations and servers as well as for network backbones, Gigabit Ethernet transmits full duplex from point to point using switches and half duplex in a shared environment (CSMA/CD) using a hub. as interconnection fabric until Big Blue has it tweaked See tweak. to support the Federation switch. McGaughan says that Federation support on the pSeries 655 running Linux will happen this year, and the word on the street is that it will happen around mid-2004. That is, by the way, just after when IBM is expected to debut its Power5-based "Squadron" servers, which are rumored to be coming in April or May in eight-way configurations.
The high-end 32-way pSeries 690 is the only other machine that has the 1.7GHz Power4+ chips yet. The 16-way pSeries 670 is still using 1.5GHz processors. The question many IBM customers want to have an answer to is when Big Blue is going to get around to shipping an even faster Power4+ chip, perhaps hitting 2GHz or higher. There has been plenty of speculation and rumor about such a thing, and IBM wants to keep pace with the benchmarks that rival Hewlett Packard has been showing with its 64-way 1.5GHz "Madison" Itanium 2-based Integrity line of servers, which are also known as Superdomes. In November 2003, HP broke through the 1 million transaction per minute (TPM (1) See TP monitor.
(2) (Transactions Per Minute) The number of transactions processed within one minute. See TPS.
(3) (Trusted Platform M ) barrier on the TPC-C A benchmark that measures overall transaction processing performance. See TPC. online transaction processing See transaction processing and OLCP. benchmark using a 64-way Superdome running HP-UX HP's version of Unix that runs on its 9000 family. It is based on SVID and incorporates features from BSD Unix along with several HP innovations.
(operating system) HP-UX - The version of Unix running on Hewlett-Packard workstations. 11i and Oracle 10g See Oracle database. Enterprise Edition. Specifically, this machine processed 1,008,145 TPM at a cost of $8.33 per TPM after a staggering 48% discount on hardware, software, and maintenance over a three year term.
IBM has fallen way behind on this in terms of aggregate performance, but still benefits because in a CPU-based pricing world, a Power4 core still does almost twice as much work (at least as far as TPC-C is concerned) as a Madison chip in the Superdome.
In June 2003, a 32-way "Regatta-H" pSeries 690 tested at 763,898 TPM running IBM's AIX variant of Unix and its own DB2 database. After a 41% large systems discount, the cost of this machine came in at $8.31 per TPM. In September 2003, IBM ran the TPC-C test on the same 32-way pSeries 690, only this time running Oracle 10g on AIX. That machine could do 768,839 TPM at a cost of $8.55 per TPM, again after a hefty discount. The speculation was that a 2GHz Power4+ MCM for the pSeries 690 might have come out before the end of 2003, but that clearly didn't happen. But IBM sources have said that the Power4+ still has some gas in it. If IBM can get to 2 GHz, that should bring an extra 15% to 20% more performance on the TPC-C test, or around 900,000 TPM. If IBM boosts main memory on the machines to 1TB, as HP did with the Superdomes, it could push performance on the TPC-C benchmark well above 1 million TPM. If IBM can get to 2.1GHz or higher, tune Oracle 10g a bit more, it could even go a bit higher than 1 million TPM and it might even be able to get the bang for the buck down to $7.50 per TPM or so.