IBM ALTERS SILICON TO INCREASE CHIP SPEEDS UP TO 35 PERCENT.

IBM has developed a breakthrough method to alter silicon - the fundamental material at the heart of microchips - which is expected to boost chip speeds by up to 35 percent.

Called "Strained Silicon", the technology stretches the material, speeding the flow of electrons through transistors to increase performance and decrease power consumption in semiconductors.

This marks the fifth major breakthrough in semiconductor technology announced by IBM in less than four years. IBM estimates that strained silicon technology could find its way into products by 2003.

"Most of the industry is struggling with extending chip performance as we approach the fundamental physical limits of silicon," said Randy Isaac, vice president of science and technology, IBM Research. "We're able to maintain our technology lead by also focusing our research on innovative ways to improve chip materials, device structures and design. This approach to R&D makes possible breakthroughs like strained silicon."

The new technology takes advantage of the natural tendency for atoms inside compounds to align with one another. When silicon is deposited on top of a substrate with atoms spaced farther apart, the atoms in silicon stretch to line up with the atoms beneath, stretching - or "straining" - the silicon. In the strained silicon, electrons experience less resistance and flow up to 70 percent faster, which can lead to chips that are up to 35 percent faster - without having to shrink the size of transistors.

"Just as important as finding ways to improve the performance of silicon is getting these breakthroughs out of the labs and into the marketplace quickly," said Bijan Davari, vice president of semiconductor development, IBM Microelectronics. "Strained silicon, combined with our prior advances in copper, silicon-on-insulator, silicon germanium and low-K materials, will allow us to maintain our one-to-two year lead in semiconductor technologies over the rest of the industry."

The evolution of semiconductor technology has traditionally followed a trend described by Moore's Law, an industry axiom that predicts that the number of transistors on a chip will double every 18 months, largely due to continued miniaturization known as scaling. While efforts to shrink the transistor continue, dimensions of the devices are already approaching the atomic level, beyond which simple scaling will cease.

The first paper outlines the successful implementation of strained silicon with current standard semiconductor processes, with minimal impact on existing manufacturing lines. The second paper demonstrates that strained silicon can be integrated with IBM's breakthrough silicon-on-insulator process, combining these two technologies for an even bigger boost in performance.