Hughes Selects LogicVision and IBM for Major Satellite Program.SAN JOSE, Calif.--(BUSINESS WIRE)--July 9, 1998-- IBM Microelectronics Qualifies LogicVision's icBIST(tm) in its SA-12 (.25um) Design System LogicVision, Inc., the leader in embedded ATE technology for complex integrated circuits (ICs) and boards, today announced that Hughes Space and Communications Company (HSC HSC - Center for Studying Health System Change HSC - Half Slotted Container (corrugated box style) HSC - Hamlet Swim Club HSC - Hand and Shoe Contamination HSC - Handset Control HSC - Hard Shell Case HSC - Hardware Systems Command HSC - Harmonic Stripline Cavity HSC - Harmonic System Commodity (standardized product identification system) HSC - Hayes Specialties Corp (Saginaw, Michigan) HSC - Hazardous Substances Committee (OSPAR Commission)) has successfully completed a multi-million gate design using LogicVision's icBIST(tm) in IBM's (NYSE:IBM) SA-12 (.25 um) process technology. This complex digital signal processing (DSP) ASIC is one of several to be used in HSC's new Geomobile (GEM) satellite product line. GEM satellites support mobile telephony services, via cellphone size handsets, and employ reconfigurable DSP ASICs that allow rapid tailoring to meet each service provider's needs, even on-orbit. As HSC's first multi-million gate design success neared completion, IBM also qualified and integrated icBIST into its ASIC flow making icBIST the first third-party commercial product of its kind to achieve such a status. When faced with designing complex ASICs with more than two million gates, HSC reviewed and evaluated companies recognized as best in their respective fields. For testing these complex devices, HSC selected LogicVision's icBIST because it was the only product-level test solution that could address all of its critical business and technical requirements. IBM was selected to supply the ASICs because of its recognized expertise in building and testing reliable, highly complex, multi-million-gate ASICs. "Built-in self-test is essential for rapid assembly and test of advanced DSP-based satellites," said Brian Clebowicz, manager of HSC's Digital Electronics Operation. "The complexity of our mega-gate designs makes previous test approaches impractical. HSC requires a highly automated, hierarchical test solution that provides at-speed testing with high fault coverage, which is why we chose icBIST from LogicVision. The ability to self-test using a simple initiation sequence and a short test signature, rather than millions of test vectors, makes it easy to employ at all levels of satellite integration." icBIST addresses difficult timing issues not handled by conventional test approaches, such as testing logic at-speed across clock domains. The automation within icBIST provides the analysis, insertion and verification capabilities required to quickly implement a testable design with an embedded ATE. Once designed into the ASIC, LogicVision's embedded ATE delivers high fault coverage tests at the required speeds for the entire life of the ASIC. HSC can leverage the same embedded ATE to test ASICs, boards, and the digital communication system. LogicVision and IBM have also completed the integration of LogicVision's icBIST embedded ATE solution into the IBM ASIC design flow for the SA-12 process technology. In 1997, IBM and LogicVision embarked upon a project to qualify icBIST for customer product-level test of designs using the IBM SA-12 design system. Known for its high standards and expertise in the area of BIST, IBM defined requirements and verified results using one of the most comprehensive test designs ever conceived. The requirements included the ability to optimize the coexistence of IBM's level-sensitive scan design level-sensitive scan design (electronics) scan design - (Or "Scan-In, Scan-Out") A electronic circuit design technique which aims to increase the controllability and observability of a digital logic circuit by incorporating special "scan registers" into the circuit so that they form a scan path. Some of the more common types of scan design include the multiplexed register designs and level-sensitive scan design (LSSD) used extensively by IBM. - (circuit design) (LSSD LSSD - Lake Superior Ski Division LSSD - Lebanon Special School District (Tennessee) LSSD - Level Sensitive Scan Design LSSD - Literary Society of San Diego LSSD - Lunar Surface Sampling Device) A kind of scan design which uses separate system and scan clocks to distinguish between normal and test mode. Latches are used in pairs, each has a normal data input, data output and clock for system operation. For test operation, the two latches form a master/slave pair with one scan input, one scan output and non-overlapping scan clocks A and B which are held low during system operation but cause the scan data to be (LSSD) structures with LogicVision's BIST structures, unique clocking techniques and special pads, to name a few key examples. "As the leading supplier of multi-million-gate ASICs, we continue to see a growing number of customers who want LogicVision's product," said Rich Colbourne, senior manager at IBM Microelectronics. "For system customers with complex designs, such as Hughes, the combination of IBM's SA-12 product technology and test methodology and LogicVision's icBIST for product-level test provides unmatched product quality." "To be selected by both IBM and HSC for these types of challenges underscores the confidence leading system companies and semiconductor manufacturers have in our embedded ATE solutions," said Vinod Agarwal, LogicVision president and CEO. "HSC purchased more than half a million dollars worth of LogicVision's icBIST products and services for the first set of chips. Their initial success demonstrates our ability to satisfy the test requirements for complex ASICs and systems while achieving significant savings in test time and costs." The Geomobile Satellites Hughes geomobile (GEM) satellites features a 12.25-meter deployable reflector, on-board digital signal processing, circuit switching and digital beamforming. Upon launch, GEM satellites provide instant telephone service to users of portable, cellphone sized handsets. The GEM communications payload contains an on-orbit reconfigurable digital processor that can meet the needs of multiple customers, or adapt to the changing needs of a single customer. The first ASIC design for the digital processor is well over two million gates in size, including over one million logic gates and over 100 small memories. The IBM SA-12 Process Technology The SA-12 standard-cell and gate-array high-performance ASIC, with 0.25um Ldrawn lithography, is optimized for low 2.5-volt operation with additional optional voltage choices for I/O interfacing. Six levels of metal, five for global routing and one for local interconnects, provide 3.4 million gate array wireable gates on a single die. I/O library elements support multiple industry requirements. About icBIST icBIST is the industry's first embedded ATE solution for at-speed test and diagnostics of digital and mixed-signal ASICs, system-on-a-chips (SOCs), and systems. icBIST is the only test solution to offer a scalable and reusable test strategy that delivers significant reductions in test development time and manufacturing test costs for high-performance products based on very deep sub-micron (VDSM VDSM - Very Deep Sub Micron) technology (0.35 micron or less). Customer use and hardware success have clearly demonstrated that LogicVision's icBIST delivers an effective embedded ATE solution for products that depend on high-speed, million-gate VDSM designs. About LogicVision LogicVision is the leading supplier of embedded ATE solutions to the electronics industry worldwide. Embedded ATE provides the most complete and cost-effective test and diagnostic solution for companies designing and manufacturing highly complex chips and systems. The solution combines patented intellectual property (IP) circuit designs with powerful test automation software Software used to test new revisions of software by automatically entering a predefined set of commands and inputs.. The results are test and diagnostic functions embedded on chip to achieve lower-cost test and at-speed, re-usable tests for use at each level of integration, from chip to system. With the ability to test many functions, including logic, memory, mixed signal and interconnects, LogicVision offers customers the most complete embedded ATE solution available on the market. LogicVision has licensed its embedded ATE technology to major companies worldwide in the computer, communications, networking, military/aeronautics and semiconductor industries. LogicVision is headquartered in San Jose, California; with sales and support offices in Waltham, Massachusetts; Richardson, Texas; and Fareham, United Kingdom. Distribution partner Pacific Design, Inc. provides sales and support for LogicVision products in Japan. The company also has a research and development facility in Ottawa, Ontario. For more information contact LogicVision, Inc., 101 Metro Drive, Third Floor, San Jose, California, 95110, USA. Telephone 408/453-0146 or 888/584-2478; fax 408/467-1180; email: info@logicvision.com. LogicVision can be reached on the Internet at www.logicvision.com. LogicVision is a registered trademark and icBIST is a trademark of LogicVision, Inc. Copyright 1998 LogicVision, Inc. CONTACT: Corporate contact: LogicVision, Inc. Clarisse Balistreri, 408/453-0146 email: clarisse@logicvision.com or Agency contact: McClenahan Bruer Communications Rich Bruer, 503/643-9035 email: rich@mcbru.com |
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