Hughes Aircraft Company Standardizes on Synopsys Synthesis and High-Level Design Automation Methodology; Six-Month Evaluation Culminates in Multi-Million Dollar, 3-Year Contract.MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--March 5, 1996--Synopsys, Inc. (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :SNPS SNPS Space Nuclear Power System ) today announced that it has signed a strategic alliance with Hughes Aircraft Hughes Aircraft Company was a major aerospace and defense company founded by Howard Hughes. The group was based near Ballona Creek, in Culver City, California, USA, on the Pacific Coast. Hughes Aircraft was acquired by General Motors in 1985. Company to provide the company with Synopsys' industry-leading logic synthesis tools. The agreement is a direct result of an extensive evaluation of commercial logic synthesis products performed by Hughes' Digital Process Owners Council (DPOC DPOC Data Processing Oversight Commission DPOC Deployable Port Operations Center DPOC Dcgs Peds (Processing, Exploitation, and Dissemination System) Operation Center (US DoD) ). Hughes is standardizing on Synopsys' synthesis tools and high-level design automation (HLDA HLDA Hold Acknowledge HLDA Human Leucocyte Differentiation Antigens HLDA Heteroscedastic Linear Discriminant Analysis HLDA High Level Design Automation HLDA Homeschool Legal Defense Association (also seen as HSLDA) ) methodology to support its common digital design processes. The combination of Hughes' best practice design process with Synopsys tools provides the highest value for Hughes and its customers. "Hughes has been a long-standing Synopsys customer going back to 1988," said Alain Labat, senior vice president of worldwide field operations at Synopsys. "The company was one of the early adopters of our logic synthesis tools and this agreement affirms the company's commitment to standardize on our HLDA methodology for creation of complex ICs and ASICs. We are excited by the outcome of the Hughes evaluation and benchmark which demonstrated conclusively that Synopsys' logic synthesis delivers quality results, and we feel our methodology offers the greatest productivity increases available on the market." The six-month Hughes DPOC evaluation compared Synopsys' Design Compiler logic synthesis tool against competitive tools based on the key decision criteria of quality of results (QOR) and overall value of design methodologies. Hughes' DPOC judged Design Compiler to be the best technical and business synthesis solution. The technical criteria for the benchmark included: -- quality and reliability of tools -- quality of ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. vendor libraries supported -- VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. source-level debugging -- user interface and ease-of-use -- training and support -- vendor viability -- technology re-mapping -- generated schematic quality -- FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. vendor library support -- incremental synthesis. In addition to Design Compiler, other Synopsys tools in the Hughes DPOC evaluation were: VHDL Compiler, Design Analyzer, DesignWare, and FPGA Compiler. Hughes also gave Synopsys positive marks for offering products such as HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. Advisor, DesignWare Developer, Floorplan Manager, and DesignPower. The agreement provides all of Hughes Electronics with access to all Synopsys products and support services support services Psychology Non-health care-related ancillary services–eg, transportation, financial aid, support groups, homemaker services, respite services, and other services including Behavioral Compiler and the COSSAP DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive design environment -- Synopsys' advanced tools for algorithm development and implementation, and behavioral synthesis. "The key to our market leadership and future is the use of integrated product teams to deliver quality products on time and at the lowest possible cost," said Steve Iglehart, vice president of engineering for Hughes Aircraft. "DPOC, and other process owners, are improving our engineering competitiveness through standardization on best-in-class processes and software tools across the enterprise." "We are reducing the number of engineering tools for all design disciplines by almost 70 percent," said Jarel Wheaton, project manager for tool standardization at Hughes. "This strategic agreement with Synopsys for digital design will result in significant contributions to our overall savings goal and is benefiting both Hughes and Synopsys." Synopsys, Inc. (NASDAQ:SNPS) develops, markets and supports high-level design automation models and software for designers of integrated circuits (ICs) and electronic systems. The company pioneered the commercial development of synthesis technology, which serves as the foundation of the company's high-level design methodology. Synopsys offers a comprehensive set of synthesis, simulation, test, and design reuse solutions, which support both Verilog HDL and VHDL. -0- Note to Editors: Synopsys is a registered trademark of Synopsys Inc. Design Power, Floorplan Manager, COSSAP, DesignWare, DesignWare Developer, Design Analyzer, FPGA Compiler, Behavioral Compiler, Design Compiler, HDL Compiler and VHDL Compiler are trademarks of Synopsys. Verilog is a registered trademark of Cadence. All other trademarks are the property of their respective owners. CONTACT: Synopsys, Inc. Paula Jones, 415/694-4112 paula@synopsys.com or VitalCom Scott Seiden, 415/637-8212 vitalcom@batnet.com |
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