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High-performance computer architecture; proceedings. (CD-ROM included).

QA76.5

0-7695-2275-0

High-performance computer architecture; proceedings. (CD-ROM included)

International Symposium on High-Performance Computer Architecture, HPCA-11 (11th: 2005: San Francisco, CA)

Computer Society Press, [c]363

420 p.

$125.00 (pa)

The proceedings of the February 2005 symposium consists of 28 regular papers on processor architecture, thermal considerations, communication architectures, energy and power, memory system issues, evaluation methodologies, software debugging support, and multithreading, and five short papers from industry. Topics include checkpointed early load retirement, the limits of leakage power reduction in caches, a performance comparison of DRAM memory system optimizations for SMT processors, and security enhancement to symmetric shared memory multiprocessors. No subject index is provided in the book, but the papers are searchable on the CD-ROM in Adobe Acrobat Reader.
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Title Annotation:MATH, COMPUTERS
Publication:SciTech Book News
Article Type:Book Review
Date:Jun 1, 2005
Words:122
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