Green Hills Software To Provide Integrated Development Environment For MIPS Technologies' MIPS32 and MIPS64 Processor Cores.Business Editors SANTA BARBARA, Calif.--(BUSINESS WIRE)--March 13, 2000 Green Hills Named "MIPS Technologies Preferred Tools Provider" For Both Cores Green Hills Software today announced a new technology development and cooperative marketing agreement with MIPS Technologies Inc. Per the agreement, Green Hills will port its MULTI MULTI Multiple 2000 Integrated Development Environment See IDE. integrated development environment - interactive development environment and Optimizing Compilers to MIPS' new MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. 32(TM) 4Kc(TM) (code named Jade) and MIPS64(TM) 5Kc(TM) (code named Opal) 32- and 64-bit processor cores. MIPS, in turn, will introduce Green Hills as "MIPS Technologies preferred tools provider," giving Green Hills a leg up with new MIPS Technologies core prospects. "The MIPS(R) processor architecture has always been a key component of our embedded strategy," said John Carbone, vice president of marketing at Green Hills. "Our compilers and development environment have been optimized to take full advantage of the MIPS processor architecture's superior mix of high performance, low power consumption, and reduced memory usage. We're extremely pleased to have been selected as MIPS Technologies' preferred tools supplier for the MIPS32 4K and MIPS64 5K architectures. This raises the bar for high-performance, low-power embedded computing." "Easy-to-use integrated development environments are the key to maximizing productivity for the large programming teams that work on today's complex embedded software projects," said Brian Knowles, vice president of marketing for MIPS Technologies Inc. "Efficient compilers are the key to reaping the performance and power/memory savings features of the MIPS-based processor architectures. We're happy to have Green Hills on board for the MIPS32 and MIPS64 architectures." The MIPS32 4Kc (Jade) is a high-performance, synthesizeable, 32-bit RISC processor core optimized for low-power, battery-operated, system-on-a-chip ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. applications. Fully compatible with the MIPS32 architecture, Jade supports R3000(R) and R4000(R) user-level code and is optimized for running embedded operating systems. The Jade core and its bus interface operate at speeds from 0-200 MHz, consuming just 2 mW/MHz when equipped with 16 kbytes of cache and fabricated in a typical 0.25-micron process. The core features a five-stage pipeline with branch control and single-cycle execution for most instructions, a 32-bit entry MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory. MMU - Memory Management Unit , and up to 16 kbytes each of 4-way, set-associative instruction and data cache. The MIPS64 5Kc (Opal) is a high-performance, synthesizeable 64-bit RISC processor core optimized for low-power, battery-operated, system-on-a-chip ASIC applications. Optimized for embedded operating systems, Opal runs user R4000(R) and R5000(R) code, features a peak clock frequency of 375 MHz, and consumes just 1 mW/MHz when fabricated using a typical 0.15-micron CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. process. Opal features a six-stage pipeline with branch control and single-cycle execution for most instructions, a co-processor interface for FPUs, a 64-entry MMU, and up to 64 kbytes each of 4-way set-associative cache. The MULTI 2000 IDE, together with Green Hills' family of optimizing C, C++,EC++, and Ada95 compilers, automates all aspects of embedded software development for MIPS processors, including the MIPS32 4Kc (Jade) and MIPS64 5Kc (Opal) architectures. Available for Windows 95/98, Windows NT, and Unix host platforms, the MULTI IDE features a window-oriented editor, source-level debugger, graphical program builder, run-time error checker, version control system, performance profiler, optimizing profiler (CodeBalance(TM)), and real-time RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. EventAnalyzer. MULTI also features an instruction set simulator An Instruction Set Simulator (ISS) is a simulation model, usually, but by no means always, coded in a high-level language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's (SimMIPS) that allows programmers to develop and test code on a PC or workstation without the need for the target hardware. The heart of the MULTI environment is a source-level debugger that supports process- and system-level debug. The debugger provides a separate window for each process, supports mixed assembly and high-level language formats, includes a language-sensitive expression evaluator, and provides special support for C++ (such as a Class Browser, object display and template debug capability). The MULTI 2000 debugger is fully RTOS aware, which enables designers to debug and tune their applications at a task level. With the MULTI debugger, designers working with popular RTOSs like ThreadX(TM) can start and stop threads, and monitor OS resources like buffers, queues, and semaphors. MULTI 2000's EventAnalyzer, fully integrated with the ThreadX RTOS, builds on the debugger's real-time capabilities, graphically displaying system and application events on an expandable timeline in real time. Operating like a high-level logic analyzer, the EventAnalyzer GUI (Graphical User Interface) A graphics-based user interface that incorporates movable windows, icons and a mouse. The ability to resize application windows and change style and size of fonts are the significant advantages of a GUI vs. a character-based interface. displays all context switches, ThreadX API calls, and interrupts in a time-relative manner using intuitive icons. The EventAnalyzer also provides versatile navigation capabilities that allow programmers to zoom in and out of the timeline to obtain greater detail about particular event sequences. The MULTI 2000 IDE features the industry's most advanced MIPS-based C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ optimizing compiler. The scaleable C/C++ compiler lets programmers use switch options to select any subset of C++ they want, from bare bones C, to full-blown ANSI/ISO C++. The compiler also supports Embedded C++ (EC++), a dialect of C++ optimized for resource-constrained embedded applications that achieves the efficiency of C while preserving many of the best object-oriented features of C++. MULTI 2000 will be available for the MIPS32 4Kc and MIPS64 5Kc beginning in June. More on Green Hills Incorporated in 1982, Green Hills Software Inc., is a leading supplier of software development tools for 32- and 64-bit embedded systems. Green Hills offers a family of optimizing C, C++, Embedded C++, Ada 95, FORTRAN and Pascal compilers. The company's unique MULTI Integrated Development Environment automates the compile-edit-build-debug cycle by integrating advanced facilities such as an RTOS-aware source-level debugger, performance profiler, program builder and version control system. Green Hills Software's tools support all major 32-bit and 64-bit advanced microprocessor families and target environments, including instruction set simulators, ROM Monitors, commercial and home grown real-time operating systems (RTOS) and in-circuit emulators (ICE). Green Hills Software is headquartered in Santa Barbara, and has U.S. offices in California, Colorado, Illinois, Massachusetts, Texas, and Florida. International headquarters are located in the United Kingdom, with offices in France, Germany, the Netherlands, and Sweden. For sales information on Green Hills Software products, please call 805/965-6044 or email inquiries to sales@ghs.com. http://www.ghs.com. About MIPS Technologies Inc. MIPS Technologies Inc. is one of the world's primary architects of embedded 32- and 64-bit RISC processors. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers, and system OEMs. MIPS Technologies Inc. and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. Licensees currently include: Alchemy Microprocessor Design Group (Cadence); ATI Technologies Inc.; Broadcom Corp.; Centillium Communications Inc.; Chartered Semiconductor Manufacturing Chartered Semiconductor Manufacturing SGX: C27 NASDAQ: CHRT (abbreviated CSM) is the world's fourth largest dedicated independent semiconductor foundry, with its headquarters and main operations located in the Woodlands Industrial Park, Kranji Singapore. Ltd.; CommQuest (IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) ); ESS Technology Inc.; Excess Bandwidth Corp.; General Instrument Corp.; Integrated Device Technology IDT (NASDAQ: IDTI) was founded in 1980 as a semiconductor vendor. Employing approximately 2500 people worldwide, headquartered in San Jose, California and operating a fab in Hillsboro, Oregon, the company both designs and fabricates semiconductor components. Inc. (IDT IDT Integrated Device Technology, Inc. (Santa Clara, CA, USA) IDT I Don't Think IDT Identity Theft IDT Interrupt Descriptor Table IDT Integrated DNA Technologies IDT Inactive Duty Training IDT Instructional Design & Technology ); Lara Technology Inc.; LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Logic Corp.; Macronix; Metalink Ltd.; NEC (NEC Corporation, Tokyo, www.nec.com, www.necus.com) An electronics conglomerate known in the U.S. for its monitors. In Japan, it had the lion's share of the PC market until the late 1990s (see PC 98). NEC was founded in Tokyo in 1899 as Nippon Electric Company, Ltd. Corp.; NKK NKK Nippon Kaiji Kyokai NKK Norwegian Kennel Klub NKK Nordisk Kemiteknolog Konferens (conference for engineering students from Norway, Denmark, Sweden and Finland) NKK Navta Kriejtiv Kru Corp.; Philips Semiconductors; Quantum Effect Devices Quantum Effect Devices was a company originally named Quantum Effect Design, incorporated in 1991. The three founders, Tom Riordan, Earl Killian and Ray Kunita were senior managers at MIPS Computer Systems Inc.. Inc. (QED); Sandcraft Inc.; SiByte Inc.; Sony Corp.; Synova; Texas Instruments Inc.; and Toshiba Corp.. Numerous companies utilize MIPS-based intellectual property. MIPS Technologies Inc. is based in Mountain View, Calif., and can be reached at 650/567-5000 or http://www.mips.com. MIPS is a registered trademark and MIPS64, MIPS32, 4Kc and 5Kc are trademarks of MIPS Technologies Inc. All other trademarks are the property of their respective companies. All press materials are available on the World Wide Web via: http://www.mips.com. |
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